Patents by Inventor Tung-An YAO
Tung-An YAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250125243Abstract: A chip carrier structure is provided and defined with a chip carrier region and a wire bonding region, and the chip carrier structure includes: an insulating layer; a circuit layer formed on the insulating layer; a solder mask layer formed on the insulating layer and the circuit layer and having a plurality of openings in the wire bonding region; and a protective layer formed on a portion of the circuit layer exposed from the solder mask layer, where an area of the protective layer in each of the openings is less than 70000 ?m2. By reducing the areas of the circuit layer exposed from the openings and the protective layer exposed from the openings, the problem of delamination caused by poor bonding force between the materials of the protective layer and the circuit layer is greatly reduced, thereby improving the reliability and lifespan of the chip carrier structure.Type: ApplicationFiled: February 19, 2024Publication date: April 17, 2025Inventors: Chung-Yen HUANG, Yu-Tung YAO, Jann-Tzung LIU, Shu-Yu KO, Hsiu-Fang CHIEN
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Publication number: 20250069901Abstract: A method for manufacturing a package structure is provided. The method includes providing a package structure including a first region and a second region different from the first region, wherein the package structure comprises a package substrate having an active surface and a backside surface; and irradiating the package structure by a first light beam along a first direction from the active surface toward the backside surface, wherein the first light beam only irradiates the first region without irradiating the second region.Type: ApplicationFiled: August 25, 2023Publication date: February 27, 2025Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Tung Yao LIN, Yi Dao WANG
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Patent number: 12218094Abstract: An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.Type: GrantFiled: March 19, 2024Date of Patent: February 4, 2025Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Jen Wang, Yi Dao Wang, Tung Yao Lin
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Patent number: 12154866Abstract: A flip-chip packaging substrate and a method for fabricating the same are disclosed. The method includes stacking a plurality of insulating layers having conductive posts in a manner that the conductive posts are stacked on and in contact with one another. The insulating layers and the conductive posts serve as a core layer structure of the flip-chip packaging substrate. As such, the conductive posts having small-sized end surfaces can be fabricated according to the practical need. Therefore, when the thickness of the core layer structure is increased, the present disclosure not only increases the rigidity of the flip-chip packaging substrate so as to avoid warping, but also ensures the design flexibility of the small-sized end surfaces of the conductive posts, allowing high-density electrical connection points and fine-pitch and high-density circuit layers to be fabricated on the core layer structure.Type: GrantFiled: August 19, 2022Date of Patent: November 26, 2024Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu, Tung-Yao Kuo
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Publication number: 20240266302Abstract: A carrier substrate is provided and has a first circuit structure and a second circuit structure on opposing sides of the carrier substrate, where on one routing region, a difference between a routing ratio of a first circuit layer of the first circuit structure and a routing ratio of a second circuit layer of the second circuit structure is within 10%. Therefore, the difference between the routing ratios of the two opposing outermost circuit layers of the carrier substrate in specific target regions can be reduced, so as to avoid a warpage of the carrier substrate due to a great difference in metal distribution areas.Type: ApplicationFiled: May 18, 2023Publication date: August 8, 2024Applicant: SILICONWARE PRECISION INDUSTRIES CO., LTD.Inventors: Chung-Yan HUANG, Ning-Hsu CHANG, Wei-Hsin SHIH, Jann-Tzung LIU, Yu-Tung YAO, Hsiu-Fang CHIEN
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Publication number: 20240222306Abstract: An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.Type: ApplicationFiled: March 19, 2024Publication date: July 4, 2024Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Wei-Jen WANG, Yi Dao WANG, Tung Yao LIN
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Publication number: 20240116163Abstract: An angle-adjustable power tool has a handle, a driving head, and a positioning group. The handle has an engaging mount and an engaging disk. The engaging mount is disposed on a top of the handle and has a communicating recess and a fixing recess. The engaging disk is mounted in the fixing recess of the engaging mount. The driving head is rotatably connected to the handle and has a pivot base and a head portion. The pivot base is disposed in a bottom of the driving head and is rotatably connected to the handle to dispose the engaging mount and the engaging disk between the handle and the pivot base. The positioning group is disposed between the handle and the driving head and has a positioning mount, an elastic element, an abutting mount, and a toggling element.Type: ApplicationFiled: October 7, 2022Publication date: April 11, 2024Applicant: KUANI GEAR CO., LTD.Inventors: Tung-Yao WANG, Jia-Huei LIU
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Patent number: 11935855Abstract: An electronic package structure and a method for manufacturing the same are provided. The electronic package structure includes a first electronic component, a second electronic component, an interconnection element, an insulation layer, and an encapsulant. The second electronic component is disposed adjacent to the first electronic component. The interconnection element is disposed between the first electronic component and the second electronic component. The insulation layer is disposed between the first electronic component and the second electronic component and has a side surface and a top surface connecting to the side surface. The encapsulant surrounds the interconnection element and at least partially covers the top surface of the insulation layer and has an extended portion in contact with the side surface of the insulation layer.Type: GrantFiled: November 24, 2021Date of Patent: March 19, 2024Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Wei-Jen Wang, Yi Dao Wang, Tung Yao Lin
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Patent number: 11892270Abstract: A sight includes a main body, an erecting unit and a compensating mechanism. The compensating mechanism includes a fixing unit, a cover and an switching unit. A compensating mechanism for a sight includes a base unit, a transmission unit, an adjusting cap, a movable unit and a lock unit. The adjusting cap is located in a first position when the adjusting cap is locked by the lock unit. The adjusting cap in the first position can be rotated in a second direction or in a third direction opposite to the second direction when the lock unit is moved in a first direction to release the adjusting cap. The adjusting cap stops in a second position when the adjusting cap is rotated in the third direction so that the movable unit is propped against an end of a groove of the adjusting cap.Type: GrantFiled: May 11, 2022Date of Patent: February 6, 2024Assignees: SINTAI OPTICAL (SHENZHEN) CO., LTD., ASIA OPTICAL CO., INC.Inventor: Tung-Yao Cheng
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Patent number: 11817421Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a substrate, wherein an upper surface of the substrate includes a predetermined region and an energy-absorbing region adjacent to the predetermined region; (b) disposing a first device in the predetermined region of the upper surface of the substrate; and (c) bonding the first device to the substrate by irradiating an upper surface of the first device with an energy-beam, wherein a center of the energy-beam is moved toward the energy-absorbing region from a first position before bonding.Type: GrantFiled: June 10, 2021Date of Patent: November 14, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yi Dao Wang, Tung Yao Lin, Rong He Guo
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Publication number: 20230230953Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.Type: ApplicationFiled: March 20, 2023Publication date: July 20, 2023Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yi Dao WANG, Tung Yao LIN, Rong He GUO
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Patent number: 11652081Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.Type: GrantFiled: April 16, 2021Date of Patent: May 16, 2023Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.Inventors: Yi Dao Wang, Tung Yao Lin, Rong He Guo
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Patent number: 11578041Abstract: Two crystals of (S)-(+)-hydroxychloroquine sulfate. One crystal features diffraction peaks at 12.3±0.1°, 13.1±0.1°, 17.9±0.1°, 22.8±0.1°, 23.4±0.1°, 25.1±0.1°, and 26.3±0.1° as 2? angles in a powder X-ray diffraction pattern. The other crystal features diffraction peaks at 12.8±0.1°, 14.5±0.1°, 16.7±0.1°, 17.6±0.1°, 20.2±0.1°, 21.4±0.1°, 23.8±0.1°, 25.7±0.1°, and 26.0±0.1° as 2? angles in a powder X-ray diffraction pattern. Also disclosed are methods of preparing crystals of (S)-(+)-hydroxychloroquine sulfate.Type: GrantFiled: December 31, 2020Date of Patent: February 14, 2023Assignee: Genovate Biotechnology Co. Ltd.Inventors: Jen Chen, Nai-tung Yao
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Publication number: 20220406734Abstract: A flip-chip packaging substrate and a method for fabricating the same are disclosed. The method includes stacking a plurality of insulating layers having conductive posts in a manner that the conductive posts are stacked on and in contact with one another. The insulating layers and the conductive posts serve as a core layer structure of the flip-chip packaging substrate. As such, the conductive posts having small-sized end surfaces can be fabricated according to the practical need. Therefore, when the thickness of the core layer structure is increased, the present disclosure not only increases the rigidity of the flip-chip packaging substrate so as to avoid warping, but also ensures the design flexibility of the small-sized end surfaces of the conductive posts, allowing high-density electrical connection points and fine-pitch and high-density circuit layers to be fabricated on the core layer structure.Type: ApplicationFiled: August 19, 2022Publication date: December 22, 2022Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu, Tung-Yao Kuo
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Publication number: 20220399303Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a substrate, wherein an upper surface of the substrate includes a predetermined region and an energy-absorbing region adjacent to the predetermined region; (b) disposing a first device in the predetermined region of the upper surface of the substrate; and (c) bonding the first device to the substrate by irradiating an upper surface of the first device with an energy-beam, wherein a center of the energy-beam is moved toward the energy-absorbing region from a first position before bonding.Type: ApplicationFiled: June 10, 2021Publication date: December 15, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yi Dao WANG, Tung Yao LIN, Rong He GUO
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Publication number: 20220373296Abstract: A sight includes a main body, an erecting unit and a compensating mechanism. The compensating mechanism includes a fixing unit, a cover and an switching unit. A compensating mechanism for a sight includes a base unit, a transmission unit, an adjusting cap, a movable unit and a lock unit. The adjusting cap is located in a first position when the adjusting cap is locked by the lock unit. The adjusting cap in the first position can be rotated in a second direction or in a third direction opposite to the second direction when the lock unit is moved in a first direction to release the adjusting cap. The adjusting cap stops in a second position when the adjusting cap is rotated in the third direction so that the movable unit is propped against an end of a groove of the adjusting cap.Type: ApplicationFiled: May 11, 2022Publication date: November 24, 2022Inventor: Tung-Yao Cheng
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Publication number: 20220336406Abstract: A method for manufacturing a semiconductor package structure is provided. The method includes: (a) providing a semiconductor structure including a first device and a second device; (b) irradiating the first device by a first energy-beam with a first irradiation area; and (c) irradiating the first device and the second device by a second energy-beam with a second irradiation area greater than the first irradiation area of the first energy-beam.Type: ApplicationFiled: April 16, 2021Publication date: October 20, 2022Applicant: Advanced Semiconductor Engineering, Inc.Inventors: Yi Dao WANG, Tung Yao LIN, Rong He GUO
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Patent number: 11476204Abstract: A flip-chip packaging substrate and a method for fabricating the same are disclosed. The method includes stacking a plurality of insulating layers having conductive posts in a manner that the conductive posts are stacked on and in contact with one another. The insulating layers and the conductive posts serve as a core layer structure of the flip-chip packaging substrate. As such, the conductive posts having small-sized end surfaces can be fabricated according to the practical need. Therefore, when the thickness of the core layer structure is increased, the present disclosure not only increases the rigidity of the flip-chip packaging substrate so as to avoid warping, but also ensures the design flexibility of the small-sized end surfaces of the conductive posts, allowing high-density electrical connection points and fine-pitch and high-density circuit layers to be fabricated on the core layer structure.Type: GrantFiled: May 7, 2019Date of Patent: October 18, 2022Assignee: PHOENIX PIONEER TECHNOLOGY CO., LTD.Inventors: Pao-Hung Chou, Chun-Hsien Yu, Shih-Ping Hsu, Tung-Yao Kuo
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Publication number: 20220065414Abstract: A solar flash light includes a base, light guiding unit, inserting rod and solar photovoltaic module, where the base is provided with a through inserted hole, and a plurality of light emitting elements in electric connection with a circuit board, each light emitting element is configured in the inserted hole, and the on and off thereof is controlled by the circuit board; the light guiding unit includes two light guiding plates inserted in the inserted hole, and the bottoms of the plates face the corresponding light emitting elements; the surface of each light guiding plate is provided with a decorative pattern, the inserting rod is configured on the bottom of the base, and the solar photovoltaic module is assembled on the inserting rod, thereby converting solar energy into electrical energy to make light emitting elements irradiate, and achieving environmental protection and power saving.Type: ApplicationFiled: September 1, 2020Publication date: March 3, 2022Inventor: Tung-Yao Yang
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Publication number: 20220068171Abstract: A base structure for a water ball ornament includes a hollow and transparent main body and an opening facing upward, the opening in connection with a water ball ornament, an inner wall of the main body covered with a patterned back plate, one side of the main body provided with a photo frame holder, the photo frame holder configured with a slot and a window in communication with the slot, the slot allowing a photo to be inserted in, and the photo being directly visible through the window.Type: ApplicationFiled: September 1, 2020Publication date: March 3, 2022Inventor: Tung-Yao Yang