Patents by Inventor Tung-chuan Wang

Tung-chuan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11145565
    Abstract: A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: October 12, 2021
    Assignee: YOUNGTEK ELECTRONICS CORPORATION
    Inventors: Hsi-Ying Yuan, Tung-Chuan Wang, Chun-Yuan Hou, Ping-Lung Wang, Tzu-kuei Wen
  • Publication number: 20210043532
    Abstract: A power chip package module and a manufacturing method thereof are provided. In the manufacturing method, a temporary carrier having an alignment pattern is provided, in which the temporary carrier includes a base and a peelable adhesive material disposed on the base. Thereafter, a circuit board having an accommodating space passing therethrough is disposed on the temporary carrier according to the alignment pattern. Furthermore, a chip is disposed in the accommodating space with an active surface thereof facing the temporary carrier according to the alignment pattern, in which the chip is fixed on the temporary carrier by the peelable adhesive material. The accommodating space is filled with a molding material to form an initial package structure. The initial package structure is separated from the temporary carrier, and then an electrically and thermally conductive layer is formed on a bottom surface of the chip and is in contact therewith.
    Type: Application
    Filed: June 10, 2020
    Publication date: February 11, 2021
    Inventors: HSI-YING YUAN, TUNG-CHUAN WANG, CHUN-YUAN HOU, PING-LUNG WANG, Tzu-kuei Wen
  • Publication number: 20180315712
    Abstract: Provided is an embedded substrate package structure, including, from top to bottom, a fourth dielectric layer, a second substrate, a chip with a fifth dielectric layer, a third dielectric layer, a second dielectric layer, a first substrate and a first dielectric layer; wherein the substrates are disposed respectively with wire layers and through holes, and each of dielectric layers is disposed with openings, conductive bumps or conductive pads, wire layers, through holes, and chip to collectively form electrical connection. The chip is electrically connected to the substrate in a flip-chip manner, and the back of the chip interfaces a dielectric layer. Compared to the prior art which chip bonding is in face-up mode, the packaging structure with the face-down chip of the present invention can simplify the manufacturing process by the flip-chip method.
    Type: Application
    Filed: November 20, 2017
    Publication date: November 1, 2018
    Inventors: Sung-Lien He, Chun-Yuan Hou, Tung-Chuan Wang, Hsi-Ying Yuan, Feng-Yi Chang
  • Patent number: 10115673
    Abstract: Provided is an embedded substrate package structure, including, from top to bottom, a fourth dielectric layer, a second substrate, a chip with a fifth dielectric layer, a third dielectric layer, a second dielectric layer, a first substrate and a first dielectric layer; wherein the substrates are disposed respectively with wire layers and through holes, and each of dielectric layers is disposed with openings, conductive bumps or conductive pads, wire layers, through holes, and chip to collectively form electrical connection. The chip is electrically connected to the substrate in a flip-chip manner, and the back of the chip interfaces a dielectric layer. Compared to the prior art which chip bonding is in face-up mode, the packaging structure with the face-down chip of the present invention can simplify the manufacturing process by the flip-chip method.
    Type: Grant
    Filed: November 20, 2017
    Date of Patent: October 30, 2018
    Inventors: Sung-Lien He, Chun-Yuan Hou, Tung-Chuan Wang, Hsi-Ying Yuan, Feng-Yi Chang
  • Publication number: 20180166390
    Abstract: Provided is a planar package structure and its manufacturing method. The planar package structure totally packages a die to make the die unexposed and to protect the die from impact or scratch. Further, at least one conductive pad of the die is electronically connected to an external electronic circuit through a plurality of wiring patterns and through holes filled with conductive materials. Then, the die may be connected to the external electronic circuit and may be protected from impact or scratch.
    Type: Application
    Filed: December 9, 2016
    Publication date: June 14, 2018
    Inventors: Chao-Ching Yu, Lin-Ta Chung, Hsi-Ying Yuan, Tung-Chuan Wang
  • Patent number: 7655501
    Abstract: The present invention provides a structure of package comprising a substrate with a pre-formed die receiving cavity formed and/or terminal contact metal pads formed within an upper surface of the substrate. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. At least one re-distribution built up layer (RDL) is formed on the dielectric layer and coupled to the die via contact pad. Connecting structure, for example, UBM is formed over the re-distribution built up layer. Terminal Conductive bumps are coupled to the UBM.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: February 2, 2010
    Assignee: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Tung-Chuan Wang, Chao-Nan Chou, Chih-Wei Lin
  • Patent number: 7525185
    Abstract: The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate.
    Type: Grant
    Filed: March 19, 2007
    Date of Patent: April 28, 2009
    Assignee: Advanced Chip Engineering Technology, Inc.
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Tung-Chuan Wang, Hsien-Wen Hsu, Chih-Ming Chen
  • Patent number: 7498556
    Abstract: The present invention provides an image sensor module having build-in package cavity and the Method of the same. An image sensor module structure comprising a substrate with a package receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate, and a package having a die with a micro lens disposed within the package receiving cavity. A dielectric layer is formed on the package and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.
    Type: Grant
    Filed: March 15, 2007
    Date of Patent: March 3, 2009
    Assignee: Adavanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Jui-Hsien Chang, Tung-Chuan Wang
  • Patent number: 7459729
    Abstract: The present invention discloses a structure of package including: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: December 2, 2008
    Assignee: Advanced Chip Engineering Technology, Inc.
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Tung-chuan Wang
  • Publication number: 20080274579
    Abstract: The present invention provides a structure of package comprising a substrate with a die receiving cavity formed within an upper layer of the substrate, wherein terminal pads are formed on the upper surface of the substrate, the same plain as the micro lens. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. A re-distribution metal layer (RDL) is formed on the dielectric layer and coupled to the die. An opening is formed within the dielectric layer and a top protection layer to expose the micro lens area of the die for Image Sensor chip. A protection layer (film) be coated on the micro lens area with water repellent and oil repellent to away the particle contamination. A transparent cover with coated IR filter is optionally formed over the micron lens area for protection.
    Type: Application
    Filed: July 9, 2008
    Publication date: November 6, 2008
    Applicant: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Tung-Chuan Wang
  • Publication number: 20080261346
    Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.
    Type: Application
    Filed: July 1, 2008
    Publication date: October 23, 2008
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Tung-chuan Wang
  • Publication number: 20080248614
    Abstract: The present invention provides a structure of package comprising a substrate with a pre-formed die receiving cavity formed and/or terminal contact metal pads formed within an upper surface of the substrate. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. At least one re-distribution built up layer (RDL) is formed on the dielectric layer and coupled to the die via contact pad. Connecting structure, for example, UBM is formed over the re-distribution built up layer. Terminal Conductive bumps are coupled to the UBM.
    Type: Application
    Filed: June 18, 2008
    Publication date: October 9, 2008
    Inventors: Wen-Kun Yang, Tung-Chuan Wang, Chao-Nan Chou, Chih-Wei Lin
  • Publication number: 20080230884
    Abstract: The present invention provides a semiconductor device package having multi-chips with side-by-side configuration comprising a substrate with die receiving through holes, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A first die having first bonding pads and a second die having second bonding pads are respectively disposed within the die receiving through holes. The first adhesion material is formed under the first and second die and the substrate, and the second adhesion material is filled in the gap between the first and second die and sidewall of the die receiving though holes of the substrate. Further, bonding wires are formed to couple between the first bonding pads and the first contact pads, between the second bonding pads and the first contact pads. A dielectric layer is formed on the bonding wires, the first and second die and the substrate.
    Type: Application
    Filed: March 19, 2007
    Publication date: September 25, 2008
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Tung-Chuan Wang, Hsien-Wen Hsu, Chih-Ming Chen
  • Publication number: 20080224248
    Abstract: The present invention provides an image sensor module having build-in package cavity and the Method of the same. An image sensor module structure comprising a substrate with a package receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate, and a package having a die with a micro lens disposed within the package receiving cavity. A dielectric layer is formed on the package and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.
    Type: Application
    Filed: March 15, 2007
    Publication date: September 18, 2008
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Jui-Hsien Chang, Tung-Chuan Wang
  • Publication number: 20080197478
    Abstract: The present invention provides a semiconductor device package with the die receiving through hole and connecting through holes structure comprising a substrate with a die receiving through hole, connecting through holes structure and first contact pads on an upper surface and second contact pads on a lower surface of the substrate. A die is disposed within the die receiving through hole. A first adhesion material is formed under the die and a second adhesion material is filled in the gap between the die and sidewall of the die receiving though hole of the substrate. Further, a bonding wire is formed to couple and the bonding pads and the first contact pads. A dielectric layer is formed on the bonding wire, the die and the substrate.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 21, 2008
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Tung-Chuan Wang, Hsien-Wen Hsu
  • Publication number: 20080197435
    Abstract: The present invention provides a structure of package comprising a substrate with a die receiving cavity formed within an upper layer of the substrate, wherein terminal pads are formed on the upper surface of the substrate, the same plain as the micro lens. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. A re-distribution metal layer (RDL) is formed on the dielectric layer and coupled to the die. An opening is formed within the dielectric layer and a top protection layer to expose the micro lens area of the die for Image Sensor chip. A protection layer (film) be coated on the micro lens area with water repellent and oil repellent to away the particle contamination. A transparent cover with coated IR filter is optionally formed over the micron lens area for protection.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 21, 2008
    Applicant: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Tung-Chuan Wang
  • Publication number: 20080191333
    Abstract: The present invention provides a structure of package comprising a substrate with a die through hole and a contact through holes structure formed there through, wherein a terminal pad is formed under the contact through hole structure and a contact pad is formed on a upper surface of the substrate. A die having a micro lens area is disposed within the die through hole by adhesion. A wire bonding is formed on the die and the substrate, wherein the wire bonding is coupled to the die and the contact pad. A protective layer is formed to cover the wire bonding. A transparent cover is disposed on the die within the die through hole by adhesion to expose the micro lens area. Conductive bumps are coupled to the terminal pads.
    Type: Application
    Filed: February 8, 2007
    Publication date: August 14, 2008
    Applicant: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Diann-Fang Lin, Jui-Hsien Chang, Tung-chuan Wang, Hsien-Wen Hsu
  • Publication number: 20080173792
    Abstract: The present invention provides an image sensor module structure comprising a substrate with a die receiving cavity formed within an upper surface of the substrate and conductive traces within the substrate and a die having a micro lens disposed within the die receiving cavity. A dielectric layer is formed on the die and the substrate, a re-distribution conductive layer (RDL) is formed on the dielectric layer, wherein the RDL is coupled to the die and the conductive traces and the dielectric layer has an opening to expose the micro lens. A lens holder is attached on the substrate and the lens holder has a lens attached an upper portion of the lens holder. A filter is attached between the lens and the micro lens. The structure further comprises a passive device on the upper surface of the substrate within the lens holder.
    Type: Application
    Filed: January 23, 2007
    Publication date: July 24, 2008
    Applicant: Advanced Chip Engineering Technology Inc.
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Tung-chuan Wang, Chihwei Lin, Hsien-Wen Hsu
  • Publication number: 20080157312
    Abstract: The present invention discloses a structure of package comprising: a substrate with a die receiving through hole, a connecting through hole structure and a first contact pad; a die having micro lens area disposed within the die receiving through hole; a transparent cover covers the micro lens area; a surrounding material formed under the die and filled in the gap between the die and sidewall of the die receiving though hole; a dielectric layer formed on the die and the substrate; a re-distribution layer (RDL) formed on the dielectric layer and coupled to the first contact pad; a protection layer formed over the RDL; and a second contact pad formed at the lower surface of the substrate and under the connecting through hole structure.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Inventors: Wen-Kun Yang, Jui-Hsien Chang, Tung-Chuan Wang
  • Publication number: 20080142946
    Abstract: The present invention provides a structure of package comprising a substrate with a pre-formed die receiving cavity formed and/or terminal contact metal pads formed within an upper surface of the substrate. A die is disposed within the die receiving cavity by adhesion and a dielectric layer formed on the die and the substrate. At least one re-distribution built up layer (RDL) is formed on the dielectric layer and coupled to the die via contact pad. Connecting structure, for example, UBM is formed over the redistribution built up layer. Terminal Conductive bumps are coupled to the UBM.
    Type: Application
    Filed: December 13, 2006
    Publication date: June 19, 2008
    Inventors: Wen-Kun Yang, Tung-Chuan Wang, Chao-Nan Chou, Chih-Wei Lin