Patents by Inventor Tung-Hao Huang

Tung-Hao Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210327720
    Abstract: A chemical-mechanical polishing (CMP) system includes a head, a polishing pad, and a magnetic system. The slurry used in the CMP process contains magnetizable abrasives. Application and control of a magnetic field, by the magnetic system, allows precise control over how the magnetizable abrasives in the slurry may be drawn toward the wafer or toward the polishing pad.
    Type: Application
    Filed: June 30, 2021
    Publication date: October 21, 2021
    Inventors: Yen-Ting Chen, Chun-Hao Kung, Tung-Kai Chen, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20210313190
    Abstract: Methods of manufacturing a chemical-mechanical polishing (CMP) slurry and methods of performing CMP process on a substrate comprising metal features are described herein. The CMP slurry may be manufactured using a balanced concentration ratio of chelator additives to inhibitor additives, the ratio being determined based on an electro potential (Ev) value of a metal material of the substrate. The CMP process may be performed on the substrate based on the balanced concentration ratio of chelator additives to inhibitor additives of the CMP slurry.
    Type: Application
    Filed: June 21, 2021
    Publication date: October 7, 2021
    Inventors: Chun-Hao Kung, Tung-Kai Chen, Chih-Chieh Chang, Kao-Feng Liao, Hui-Chi Huang, Kei-Wei Chen
  • Patent number: 11061670
    Abstract: A Flash memory controller for a system having first and second microcontrollers configured to perform first and second functions, and further having a Flash memory medium shared by the two microcontrollers, includes first and second execute-in-place cache controllers respectively configured to cache program code retrieved from the Flash memory for execution by the respective microcontrollers. A cache-miss arbiter controls access by the microcontrollers to the Flash memory on occurrence of a cache miss in one of the cache controllers. The arbiter may allow aborting of a first fetching operation on behalf of one of the microcontrollers upon receipt of a fetch request from the other microcontroller if the first fetching operation has retrieved a desired data unit and a threshold amount of data. The Flash memory controller may also include a decryption engine configured to decrypt encrypted program code. The decryption mode is determined from address ranges.
    Type: Grant
    Filed: March 4, 2020
    Date of Patent: July 13, 2021
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Ying Yang, Ken Yeung, Nelson Xu, Tung-hao Huang
  • Publication number: 20200285465
    Abstract: A Flash memory controller for a system having first and second microcontrollers configured to perform first and second functions, and further having a Flash memory medium shared by the two microcontrollers, includes first and second execute-in-place cache controllers respectively configured to cache program code retrieved from the Flash memory for execution by the respective microcontrollers. A cache-miss arbiter controls access by the microcontrollers to the Flash memory on occurrence of a cache miss in one of the cache controllers. The arbiter may allow aborting of a first fetching operation on behalf of one of the microcontrollers upon receipt of a fetch request from the other microcontroller if the first fetching operation has retrieved a desired data unit and a threshold amount of data. The Flash memory controller may also include a decryption engine configured to decrypt encrypted program code. The decryption mode is determined from address ranges.
    Type: Application
    Filed: March 4, 2020
    Publication date: September 10, 2020
    Inventors: Ying Yang, Ken Yeung, Nelson Xu, Tung-hao Huang
  • Patent number: 8855110
    Abstract: A personal video recorder (PVR) system includes a processing unit, a system memory coupled to the processing unit by a system memory bus, and an insertion module being coupled to the processing unit for inserting a packet into a PVR bit stream according to packet information. During a packet insertion operation, the processing unit is for reading data from the system memory, processing the data to generate the packet insertion information, and directly transferring the packet insertion information to the insertion module. By directly transferring the packet insertion information generated by the processing unit to the insertion module, memory bandwidth requirements of the system memory are reduced, and data access of the system memory is improved.
    Type: Grant
    Filed: September 4, 2006
    Date of Patent: October 7, 2014
    Assignee: Mediatek USA Inc.
    Inventors: Chien-Chung Huang, Freimann Felix, Yuan-Liang Cheng, Tung-Hao Huang
  • Patent number: 7925962
    Abstract: A Digitally Video Broadcasting—Handheld (DVB-H) system for performing forward error correction includes: a tuner for receiving a data stream; a base-band receiver, coupled to the tuner, for extracting data bytes of a multi-protocol-encapsulation forward-error-correction (MPE-FEC) frame, and performing syndrome calculation on each extracted data byte to determine a corresponding partial syndrome; and an embedded memory, coupled to the base-band receiver, for accumulating each partial syndrome to determine a complete syndrome; wherein once all syndromes of the MPE-FEC frame are received, the base-band receiver determines corresponding error values and utilizes the error values to forward error correct the MPE-FEC frame.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: April 12, 2011
    Assignee: Mediatek USA Inc.
    Inventor: Tung-Hao Huang
  • Patent number: 7496464
    Abstract: A validation system includes: a source agent for storing a plurality of test patterns; a drain agent for performing a validation operation according to a test result; and a device under test (DUT). The device under test includes: a first interface electrically connected to the source agent for communicating with the source agent and receiving the test patterns outputted from the source agent; a target system electrically connected to the first interface for processing the test patterns to generate a plurality of test results; and a second interface electrically connected to the target system and the drain agent for communicating with the drain agent and transferring the plurality of test results to the drain agent.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: February 24, 2009
    Assignee: Mediatek USA Inc.
    Inventors: Chien-Chung Huang, Yuan-Liang Cheng, Tung-Hao Huang, You-Min Yeh, Chung-Yu Chang
  • Publication number: 20080178051
    Abstract: A DVB-H system for performing forward error correction is disclosed, including: a tuner for receiving a data stream; a base-band receiver, coupled to the tuner, for extracting data bytes of an MPE-FEC frame, and performing syndrome calculation on each extracted data byte to determine a corresponding partial syndrome; an embedded memory, coupled to the base-band receiver, for accumulating each partial syndrome to determine a complete syndrome; wherein once all syndromes of the MPE-FEC frame are received, the base-band receiver determines corresponding error values and utilizes the error values to forward error correct the MPE-FEC frame.
    Type: Application
    Filed: January 18, 2007
    Publication date: July 24, 2008
    Inventor: Tung-Hao Huang
  • Publication number: 20080165774
    Abstract: An inter-network packet modifier coupled between a first network and a second network for generating an outgoing transport packet forwarded to the second network according to an incoming transport packet received from the first network is disclosed. The inter-network packet modifier includes: a storage device for storing an updated identification information; and a pattern detector for detecting a specific pattern of the incoming transport packet and for exchanging an original identification information of the incoming transport packet with the updated identification information according to the specific pattern to generate the outgoing transport packet; wherein the pattern detector is a dedicated hardware for identification information exchanging.
    Type: Application
    Filed: January 4, 2007
    Publication date: July 10, 2008
    Inventors: Chien-Chung Huang, Yuan-Liang Cheng, Tung-Hao Huang
  • Publication number: 20080060044
    Abstract: A personal video recorder (PVR) system includes a processing unit, a system memory coupled to the processing unit by a system memory bus, and an insertion module being coupled to the processing unit for inserting a packet into a PVR bit stream according to packet information. During a packet insertion operation, the processing unit is for reading data from the system memory, processing the data to generate the packet insertion information, and directly transferring the packet insertion information to the insertion module. By directly transferring the packet insertion information generated by the processing unit to the insertion module, memory bandwidth requirements of the system memory are reduced, and data access of the system memory is improved.
    Type: Application
    Filed: September 4, 2006
    Publication date: March 6, 2008
    Inventors: Chien-Chung Huang, Freimann Felix, Yuan-Liang Cheng, Tung-Hao Huang
  • Publication number: 20070258586
    Abstract: A method of processing a transport stream having a plurality of packets to output a protected transport stream includes providing a set of secret keys having a predetermined number of secret keys; generating a key indication value; selecting a secret key from the set of secret keys according to the key indication value to form a selected secret key; generating an encrypted packet based on the selected secret key and a packet in the transport stream by: encrypting the payload of the packet according to the selected secret key, and storing the key indication value in the sync field; and generating the protected transport stream based on the encrypted packet. Where each packet comprising a packet header and a payload, the packet header comprising a sync field, and the sync field carrying a preset sync pattern.
    Type: Application
    Filed: April 28, 2006
    Publication date: November 8, 2007
    Inventors: Chien-Chung Huang, Freimann Felix, Yuan-Liang Cheng, Tung-Hao Huang
  • Publication number: 20070225826
    Abstract: A validation system includes: a source agent for storing a plurality of test patterns; a drain agent for performing a validation operation according to a test result; and a device under test (DUT). The device under test includes: a first interface electrically connected to the source agent for communicating with the source agent and receiving the test patterns outputted from the source agent; a target system electrically connected to the first interface for processing the test patterns to generate a plurality of test results; and a second interface electrically connected to the target system and the drain agent for communicating with the drain agent and transferring the plurality of test results to the drain agent.
    Type: Application
    Filed: March 21, 2006
    Publication date: September 27, 2007
    Inventors: Chien-Chung Huang, Yuan-Liang Cheng, Tung-Hao Huang, You-Min Yeh, Chung-Yu Chang