Abstract: Electrostatic discharge (ESD) structures are provided. An ESD structure includes a semiconductor substrate, a first epitaxy region with a first type of conductivity over the semiconductor substrate, a second epitaxy region with a second type of conductivity over the semiconductor substrate, and a plurality of semiconductor layers. The semiconductor layers are stacked over the semiconductor substrate and between the first and second epitaxy regions. A first conductive feature is formed over the first epitaxy region and outside an oxide diffusion region. A second conductive feature is formed over the second epitaxy region and outside the oxide diffusion region. A third conductive feature is formed over the first epitaxy region and within the oxide diffusion region. A fourth conductive feature is formed over the second epitaxy region and within the oxide diffusion region. The oxide diffusion region is disposed between the first and second conductive features.

Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.

Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.

Abstract: A semiconductor device includes a first die having a first active surface and a first backside surface opposite the first active surface, a second die having a second active surface and a second backside surface opposite the second active surface, and an interposer, the first active surface of the first die being electrically coupled to a first side of the interposer, the second active surface of the second die being electrically coupled to a second side of the interposer. The semiconductor device also includes a first connector over the interposer, a first encapsulating material surrounding the second die, the first encapsulating material having a first surface over the interposer, and a via electrically coupling the first connector and the interposer. A first end of the via is substantially coplanar with the first surface of the first encapsulating material.

Abstract: The present invention relates to a composite power connector. The composite power connector includes multiple first connecting units arranged in a stack form, multiple second connecting units arranged in a stack form and a fastening element. Each first connecting unit includes a first end coupled with an electric wire, a second end formed as an insertion terminal to be coupled with a corresponding second connecting unit, a first surface having a first perforation and a second surface having a second perforation corresponding to the first perforation. A channel is defined by the first perforation and the second perforation. The fastening element penetrates through the channels of the multiple first connecting units for combining and fixing the multiple first connecting units with each other.

Abstract: A structure of the uninterrupted power supply includes a lower housing, a first terminal pedestal, a second terminal pedestal and an upper housing. The lower housing has a battery receptacle, a circuit portion and a partitioning plate thereon, wherein the partitioning plate is disposed between the battery receptacle and the circuit portion and has a first cavity and a second cavity. The first terminal pedestal and the second terminal pedestal are carried on the first cavity and the second cavity respectively. The battery has two recesses for containing the positive electrode and the negative electrode thereof. The battery is capable of being positioned into the battery receptacle and electrically with the first terminal and the second terminal after the lower housing and the upper housing are assembled.

Abstract: A structure of the uninterrupted power supply includes a lower housing, a first terminal pedestal, a second terminal pedestal and an upper housing. The lower housing has a battery receptacle, a circuit portion and a partitioning plate thereon, wherein the partitioning plate is disposed between the battery receptacle and the circuit portion and has a first cavity and a second cavity. The first terminal pedestal and the second terminal pedestal are carried on the first cavity and the second cavity respectively. The battery has two recesses for containing the positive electrode and the negative electrode thereof. The battery is capable of being positioned into the battery receptacle and electrically with the first terminal and the second terminal after the lower housing and the upper housing are assembled.