Abstract: A differential amplifier includes an input pair of transistors with a source-side resistor circuit, having a transistor biased in a triode region, and a current source. The resistor circuit in combination with a capacitance, causes source degeneration in the amplifier. The source side resistor circuit includes a first MOS transistor having a first channel terminal connected to the source of a first transistor in the differential pair, and a second channel terminal connected to the bulk terminal, and a second MOS transistor having a first channel terminal connected to the source of a second transistor in the differential pair, and a second channel terminal connected to the bulk terminal. A bias circuit biases the first MOS transistor and the second MOS transistor in a triode region. The resistance of the source-side resistor circuit and the gain of the transistors in the differential amplifier can track across process corners.

Abstract: Electronic circuits, memory devices, and methods for compensating for data distortion from channel loss are provided. In one aspect, an electronic circuit includes a converter circuit configured to convert an input signal to a digital signal and a compensation circuit coupled to the converter circuit. The converter circuit includes a sampling circuit configured to receive the digital signal and generate an output signal. The output signal includes a stream of bits to be transmitted at a plurality of consecutive clock cycles. The converter circuit also includes one or more equalizing circuits coupled to the sampling circuit. Each equalizing circuit is configured to receive a bit of an output feedback signal at one of the consecutive clock cycles. The sampling circuit is configured to generate the output signal based on the digital signal and a sum of one or more equalization outputs of the one or more equalizing circuits.

Abstract: A harmonic deceleration module, a dynamic power device, an automatic mobile vehicle, a transfer apparatus, a dynamic power supply system, and an electric bicycle are provided. The harmonic deceleration module includes a connecting member, a flexible bearing, a first frame, a first circular spline, a second frame, and a second circular spline. When the connecting member is driven, the connecting member rotates around a central axis. The connecting member has a cam part, and the cam part and the flexible bearing jointly form a wave generator. The wave generator is configured to be driven by the connecting member to drive a flexspline to continually and flexibly deform, and the flexspline drives the second circular spline and the second frame connected to the second circular spline to rotate. The second frame has a hollow channel penetrating through the second frame along the central axis.

Abstract: A continuous time linear equalizer (CTLE) circuit is provided. The CTLE circuit can include a differential pair of first and second transistors, the first and second transistors having drains connected through first and second drain resistors to a drain-side supply voltage node, and sources connected together by a source resistor and connected to one or more current sources, the first transistor in the differential pair having a gate connected to a reference voltage, and the second transistor in the differential pair having a gate connected to an input voltage, the drains of the first and second transistors providing a differential pair of signals as an output voltage, a first coupling capacitor connected between the source of the first transistor and the input voltage, and a second coupling capacitor connected to the source of the second transistor.

Abstract: A continuous time linear equalizer (CTLE) circuit is provided. The CTLE circuit can include a differential pair of first and second transistors, the first and second transistors having drains connected through first and second drain resistors to a drain-side supply voltage node, and sources connected together by a source resistor and connected to one or more current sources, the first transistor in the differential pair having a gate connected to a reference voltage, and the second transistor in the differential pair having a gate connected to an input voltage, the drains of the first and second transistors providing a differential pair of signals as an output voltage, a first coupling capacitor connected between the source of the first transistor and the input voltage, and a second coupling capacitor connected to the source of the second transistor.

Abstract: Compute-in-memory CIM operations using signed bits produce signed outputs. A circuit for CIM operations comprises an array of memory cells arranged in columns and rows, memory cells in columns connected to corresponding bit lines, and memory cells in rows connected to corresponding word lines. The array is programmable to store signed weights in sets of memory cells, the sets being operatively coupled with a corresponding pair of bit lines and a corresponding pair of word lines. Word line drivers are configured to drive true and complement voltages representing signed inputs on respective word lines in selected pairs of word lines. Sensing circuits are configured to sense differences between first and second currents on respective bit lines in selected pairs of bit lines and to produce signed outputs for the selected pairs of bit lines as a function of the difference.

Abstract: A harmonic speed reducer is provided. The harmonic speed reducer includes a wave generator, a flexible gear, a first rigid gear, and a second rigid gear. The wave generator can be driven to rotate relative to a central axis. The flexible gear has a plurality of first outer gear structures, a division groove, and a plurality of second outer gear structures. The first rigid gear has a plurality of first inner gear structures configured to be engaged with the first outer gear structures. The second rigid gear has a plurality of second inner gear structures configured to be engaged with the second outer gear structures. A first intersection line is defined between each of the first inner gear structures and a sectional surface. An angle between the first intersection line and a first horizontal line is within a range from 0.1 degrees to 5 degrees.

Abstract: A harmonic speed reducer is provided. The harmonic speed reducer includes a wave generator, a flexible gear, a first rigid gear, and a second rigid gear. The wave generator can be driven to rotate relative to a central axis. The flexible gear has a plurality of first outer gear structures, a division groove, and a plurality of second outer gear structures. The first rigid gear has a plurality of first inner gear structures configured to be engaged with the first outer gear structures. The second rigid gear has a plurality of second inner gear structures configured to be engaged with the second outer gear structures. A first intersection line is defined between each of the first inner gear structures and a sectional surface. An angle between the first intersection line and a first horizontal line is within a range from 0.1 degrees to 5 degrees.

Abstract: A harmonic deceleration module, a dynamic power device, an automatic mobile vehicle, a transfer apparatus, a dynamic power supply system, and an electric bicycle are provided. The harmonic deceleration module includes a connecting member, a flexible bearing, a first frame, a first circular spline, a second frame, and a second circular spline. When the connecting member is driven, the connecting member rotates around a central axis. The connecting member has a cam part, and the cam part and the flexible bearing jointly form a wave generator. The wave generator is configured to be driven by the connecting member to drive a flexspline to continually and flexibly deform, and the flexspline drives the second circular spline and the second frame connected to the second circular spline to rotate. The second frame has a hollow channel penetrating through the second frame along the central axis.

Abstract: An electric motor includes a casing, a stator, a rotor and a first coolant guiding structure. The stator is stored in a storage space of the casing. The stator includes a stator yoke and winding sets. The stator yoke has first side, second side, annular external surface and guiding channel. The first coolant guiding structure is disposed close to the winding sets and an inlet channel. The first coolant guiding structure has first radially guiding channel and first axially guiding channel. Two ends of the first radially guiding channel respectively have a first radial inlet and a first radial outlet. The first radial inlet is connected to the first axially guiding channel in order to receive coolant from the first axially guiding channel. The first radial outlet is aligned with at least one of the winding sets in order to supply coolant to the winding sets.