Abstract: An apparatus for forming input data for a logic simulator executes the operation processing so as to convert a net list using elements as bases into a net list using cell units as bases, and feeds the net list to a logic simulator. The apparatus for forming input data for a logic simulator is constituted by a processing device which, for a net list which uses elements as units and is constituted by connection data among the elements including parasitic resistances and parasitic capacitances, feeds, to a logic simulator, the data related to nets, parasitic resistances and parasitic capacitances but excluding those nets, and parasitic resistances and parasitic capacitances that are completed in a cell.

Abstract: A source voltage buildup detecting circuit which detects, after the source is switched on, whether the source voltage is higher than a predetermined voltage and outputs a detecting signal. The source voltage buildup detecting circuit includes a complementary metal-oxide semiconductor (CMOS) inverter, a level shifting element connected between the power source and the CMOS inverter, and a voltage generating circuit connected to an input of the CMOS inverter. The level shifting element supplies a voltage lower than the source voltage to the CMOS inverter as a working voltage, and when the source voltage becomes greater than the predetermined voltage after the source voltage is switched on, the voltage generating circuit outputs a voltage higher than the threshold voltage of the CMOS inverter. When the source voltage becomes higher than the predetermined voltage, the voltage generating circuit outputs a voltage lower than the threshold voltage of the CMOS inverter.