Patents by Inventor Twan Bearda
Twan Bearda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10892377Abstract: Example embodiments relate to selective deposition for interdigitated patterns in solar cells. One embodiment includes a method for creating an interdigitated pattern for a solar cell. The method includes providing a substrate of the solar cell. A surface of the substrate includes one or more exposed regions and one or more regions covered by a patterned first passivation layer stack protected by a hard mask. The method also includes selectively depositing a second passivation layer stack that includes at least a first layer of amorphous silicon (a-Si) on the one or more exposed regions such that the first passivation layer stack and the second passivation layer stack form the interdigitated pattern. Selectively depositing the second passivation layer stack includes adding a sublayer of the first layer on the hard mask, etching the added sublayer on the hard mask, and cleaning a surface of the remaining added sublayer.Type: GrantFiled: August 14, 2019Date of Patent: January 12, 2021Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&DInventors: Menglei Xu, Twan Bearda, Hariharsudan Sivaramakrishnan Radhakrishnan, Jef Poortmans
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Publication number: 20200091368Abstract: Example embodiments relate to selective deposition for interdigitated patterns in solar cells. One embodiment includes a method for creating an interdigitated pattern for a solar cell. The method includes providing a substrate of the solar cell. A surface of the substrate includes one or more exposed regions and one or more regions covered by a patterned first passivation layer stack protected by a hard mask. The method also includes selectively depositing a second passivation layer stack that includes at least a first layer of amorphous silicon (a-Si) on the one or more exposed regions such that the first passivation layer stack and the second passivation layer stack form the interdigitated pattern. Selectively depositing the second passivation layer stack includes adding a sublayer of the first layer on the hard mask, etching the added sublayer on the hard mask, and cleaning a surface of the remaining added sublayer.Type: ApplicationFiled: August 14, 2019Publication date: March 19, 2020Inventors: Menglei Xu, Twan Bearda, Hariharsudan Sivaramakrishnan Radhakrishnan, Jef Poortmans
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Patent number: 10326031Abstract: Methods of patterning an amorphous semiconductor layer according to a predetermined pattern via laser ablation with a pulsed laser having a laser wavelength are disclosed. In one aspect, a method may include providing the amorphous semiconductor layer on a substrate, providing a distributed Bragg reflector on the amorphous semiconductor layer, wherein the distributed Bragg reflector is reflective at the laser wavelength, providing an absorbing layer on the distributed Bragg reflector, wherein the absorbing layer is absorptive at the laser wavelength, patterning the absorbing layer by laser ablation, in accordance with the predetermined pattern, patterning the distributed Bragg reflector by performing an etching step using the patterned absorbing layer as an etch mask, and etching the amorphous semiconductor layer using the patterned distributed Bragg reflector as an etch mask.Type: GrantFiled: November 3, 2017Date of Patent: June 18, 2019Assignees: IMEC vzw, Katholieke Universiteit LeuvenInventors: Menglei Xu, Miha Filipic, Twan Bearda
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Publication number: 20180122963Abstract: Methods of patterning an amorphous semiconductor layer according to a predetermined pattern via laser ablation with a pulsed laser having a laser wavelength are disclosed. In one aspect, a method may include providing the amorphous semiconductor layer on a substrate, providing a distributed Bragg reflector on the amorphous semiconductor layer, wherein the distributed Bragg reflector is reflective at the laser wavelength, providing an absorbing layer on the distributed Bragg reflector, wherein the absorbing layer is absorptive at the laser wavelength, patterning the absorbing layer by laser ablation, in accordance with the predetermined pattern, patterning the distributed Bragg reflector by performing an etching step using the patterned absorbing layer as an etch mask, and etching the amorphous semiconductor layer using the patterned distributed Bragg reflector as an etch mask.Type: ApplicationFiled: November 3, 2017Publication date: May 3, 2018Inventors: Menglei Xu, Miha Filipic, Twan Bearda
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Patent number: 9123859Abstract: A method for module-level processing of photovoltaic cells is provided. The method includes: bonding at least one crystalline silicon photovoltaic substrate to a carrier by means of an adhesive layer, thereby leaving part of the adhesive layer uncovered; after bonding, exposing the uncovered part of the adhesive layer and the at least one crystalline silicon photovoltaic substrate to a plasma; and removing a surface portion of the at least one crystalline photovoltaic substrate. The method may further include performing an annealing step of the adhesive before bonding the at least one photovoltaic substrate to the carrier, and performing an outgassing step of the adhesive after bonding the at least one photovoltaic substrate to the carrier. The method may further include module-level rear side processing of the at least one crystalline silicon photovoltaic substrate to make a photovoltaic module.Type: GrantFiled: September 8, 2014Date of Patent: September 1, 2015Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&DInventors: Stefano Granata, Twan Bearda
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Publication number: 20150111335Abstract: A method for module-level processing of photovoltaic cells is provided. The method includes: bonding at least one crystalline silicon photovoltaic substrate to a carrier by means of an adhesive layer, thereby leaving part of the adhesive layer uncovered; after bonding, exposing the uncovered part of the adhesive layer and the at least one crystalline silicon photovoltaic substrate to a plasma; and removing a surface portion of the at least one crystalline photovoltaic substrate. The method may further include performing an annealing step of the adhesive before bonding the at least one photovoltaic substrate to the carrier, and performing an outgassing step of the adhesive after bonding the at least one photovoltaic substrate to the carrier. The method may further include module-level rear side processing of the at least one crystalline silicon photovoltaic substrate to make a photovoltaic module.Type: ApplicationFiled: September 8, 2014Publication date: April 23, 2015Applicants: KATHOLIEKE UNIVERSITEIT LEUVEN, KU LEUVEN R&D, IMEC VZWInventors: Stefano Granata, Twan Bearda
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Publication number: 20110308603Abstract: A method of passivating a silicon surface is disclosed. In one aspect, the method includes cleaning the silicon surface by subjecting the silicon surface to a sequence of steps wherein the final step is a chemical oxidation step resulting in a hydrophilic silicon surface. The method may also include drying the cleaned silicon surface using an advanced drying technique, and/or depositing an oxide layer on the silicon surface.Type: ApplicationFiled: June 17, 2011Publication date: December 22, 2011Applicants: Katholieke Universiteit Leuven, IMECInventors: Bart Vermang, Aude Rothschild, Twan Bearda
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Patent number: 7060587Abstract: A method for forming macropores in a substrate is disclosed. On a substrate a pattern of submicron features is formed. This pattern is covered with a layer, which is preferably selectively removable with respect to the substrate and the submicron features. This cover layer is removed until the submicron features are exposed. The submicron features are then etched selectively to the cover layer, thereby creating a pattern of submicron openings in this cover layer. The patterned cover layer is used as a hardmask to etch macropores in the substrate.Type: GrantFiled: January 28, 2005Date of Patent: June 13, 2006Assignee: Interuniversitair Microelektronica Centrum (IMEC)Inventors: Twan Bearda, Eddy Kunnen
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Publication number: 20050189318Abstract: A method for forming macropores in a substrate is disclosed. On a substrate a pattern of submicron features is formed. This pattern is covered with a layer, which is preferably selectively removable with respect to the substrate and the submicron features. This cover layer is removed until the submicron features are exposed. The submicron features are then etched selectively to the cover layer, thereby creating a pattern of submicron openings in this cover layer. The patterned cover layer is used as a hardmask to etch macropores in the substrate.Type: ApplicationFiled: January 28, 2005Publication date: September 1, 2005Inventors: Twan Bearda, Eddy Kunnen