Patents by Inventor Tycho RAAB

Tycho RAAB has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • FPGA power management system
    Patent number: 9910477
    Abstract: An FPGA power management system includes a host power management integrated circuit connected to a system power control block of an FPGA via an FPGA configuration/monitoring bus and a computing device via a power configuration/monitoring bus. The host power management integrated circuit includes a configuration and monitoring block configured to communicate configuration/monitoring signals to and from the FPGA system power control block and the computing device. The host power management integrated circuit further includes at least one voltage regulator for supplying an output voltage to an FPGA power rail according to a power configuration signal communicated by the configuration and monitoring block. The host power management integrated circuit further includes a power profiler configured to measure and supply to the configuration and monitoring block an output current on the FPGA power rail.
    Type: Grant
    Filed: August 27, 2014
    Date of Patent: March 6, 2018
    Assignee: IDT EUROPE GmbH
    Inventors: Anthony Kelly, Tycho Raab
  • FPGA POWER MANAGEMENT SYSTEM
    Publication number: 20160209905
    Abstract: An FPGA power management system includes a host power management integrated circuit connected to a system power control block of an FPGA via an FPGA configuration/monitoring bus and a computing device via a power configuration/monitoring bus. The host power management integrated circuit includes a configuration and monitoring block configured to communicate configuration/monitoring signals to and from the FPGA system power control block and the computing device. The host power management integrated circuit further includes at least one voltage regulator for supplying an output voltage to an FPGA power rail according to a power configuration signal communicated by the configuration and monitoring block. The host power management integrated circuit further includes a power profiler configured to measure and supply to the configuration and monitoring block an output current on the FPGA power rail.
    Type: Application
    Filed: August 27, 2014
    Publication date: July 21, 2016
    Applicant: ZENTRUM MIKROELEKTRONIK DRESDEN AG
    Inventors: Anthony KELLY, Tycho RAAB