Abstract: Logic circuits are disclosed that include one or more three-terminal chalcogenide devices. The three-terminal chalcogenide devices are electrically interconnected and configured to perform one or more logic operations, including AND, OR, NOT, NAND, NOR, XOR, and XNOR. Embodiments include series and parallel configurations of three-terminal chalcogenide devices. The chalcogenide devices include a chalcogenide switching material as the working medium along with three electrical terminals in electrical communication therewith. In one embodiment, the circuits include one or more input terminals, one or more output terminals, and a clock terminal. The input terminals receive one or more input signals and deliver them to the circuit for processing according to a logic operation. Upon conclusion of processing, the output of the circuit is provided to the output terminal. The clock terminal delivers a clock signal to facilitate operation of the three-terminal devices included in the instant circuits.

Abstract: Chalcogenide devices are delineated and sidewalls of the devices are sealed, in an anaerobic and/or anhydrous environment environment. Throughout the delineation and sealing steps, and any intervening steps, the sidewalls are not exposed to oxygen or water. In an illustrative embodiment, a cluster tool includes an etching tool and a sealing/deposition tool configured to etch and seal the chalcogenide devices and to maintain the devices in an anaerobic and/or anhydrous environment throughout the process.

Abstract: A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.

Abstract: A programmable resistance memory combines multiple cells into a block that includes one or more shared electrodes. The shared electrode configuration provides additional thermal isolation for the active region of each memory cell, thereby reducing the current required to program each memory cell.

Abstract: An electrical device includes a composite switching material. The composite switching material includes an electrically switchable component and a non-switchable component. In one embodiment, the composite switching material includes a heterogeneous mixture of at least one chalcogenide material and at least one dielectric material. The composite switching material is disposed between two electrodes and the switchable component is transformable from a resistive state to a conductive state upon application of a voltage between the two electrodes, without changing phase.

Abstract: An electronic system includes at least one reduced-complexity integrated circuit memory coupled to a memory controller. By reducing the complexity of each integrated circuit memory and concentrating the complexity within the memory controller, overall system costs may be greatly reduced and reliability improved.

Abstract: An asymmetric-threshold three-terminal electronic switching device includes three terminals coupled to a threshold-switching material. A signal applied across first and second terminals affects an electrical characteristic between the second and third electrodes to a greater extent than the same signal applied across the first and third electrodes. The affected electrical characteristic may be a threshold voltage or conductivity, for example.

Abstract: Briefly, in accordance with an embodiment of the invention, a memory and a method to manufacture the memory is provided. The memory may include a phase change material over a substrate. The memory may further include a switching material coupled to the phase change material, wherein the switching material comprises a chalcogen other than oxygen and wherein the switching material and the phase change material form portions of a vertical structure over the substrate.

Abstract: A radial memory device includes a phase-change material, a first electrode in electrical communication with the phase-change material, the first electrode having a substantially planar first area of electrical communication with the phase-change material. The radial memory device also includes a second electrode in electrical communication with the phase-change material, the second electrode having a second area of electrical communication with the phase-change material, the second area being laterally spacedly disposed from the first area and substantially circumscribing the first area. Further, a method of making a memory device is disclosed. The steps include depositing a first electrode, depositing a first insulator, configuring the first insulator to define a first opening. The first opening provides for a generally planar first contact of the first electrode.

Abstract: A phase change material may be processed to reduce its microcrystalline grain size and may also be processed to increase the crystallization or set programming speed of the material. For example, material doped with nitrogen to reduce grain size may be doped with titanium to reduce crystallization time.

Abstract: A dual resistance heater for a phase change material region is formed by depositing a resistive material. The heater material is then exposed to an implantation or plasma which increases the resistance of the surface of the heater material relative to the remainder of the heater material. As a result, the portion of the heater material approximate to the phase change material region is a highly effective heater because of its high resistance, but the bulk of the heater material is not as resistive and, thus, does not increase the voltage drop and the current usage of the device.

Abstract: A memory may be implemented with a stable chalcogenide glass which is defined as a generally amorphous chalcogenide material that does not change to a generally crystalline phase when exposed to 200° C. for 30 minutes or less. Different states may be programmed by changing the threshold voltage of the material. The threshold voltage may be changed with pulses of different amplitude and/or different pulse fall times. Reading may be done using a reference level between the threshold voltages of the two different states. A separate access device is generally not needed.

Abstract: A standalone memory device includes thin-film peripheral circuitry, including decoding circuitry. The standalone thin film memory excludes all single-crystal electronic devices and may be formed, for example, on a low-cost substrate, such as fiberglass. The memory is configured for operation with an external memory controller.

Abstract: A chalcogenide material and chalcogenide memory device having less stringent requirements for formation, improved thermal stability and/or faster operation. The chalcogenide materials include materials comprising Ge, Sb and Te in which the Ge and/or Te content is lean relative to the commonly used Ge2Sb2Te5 chalcogenide composition. Electrical devices containing the instant chalcogenide materials show a rapid convergence of the set resistance during cycles of setting and resetting the device from its as-fabricated state, thus leading to a reduced or eliminated need to subject the device to post-fabrication electrical formation prior to end-use operation. Improved thermal stability is manifested in terms of prolonged stability of the resistance of the device at elevated temperatures, which leads to an inhibition of thermally induced setting of the reset state in the device. Significant improvements in the 10 year data retention temperature are demonstrated.

Abstract: An electronic device including a breakdown layer having variable thickness. The device includes a variable resistance material positioned between two electrodes. A breakdown layer is interposed between the variable resistance material and one of the electrodes. The breakdown layer has a non-uniform thickness, which serves to bias the breakdown event toward the thinner portions of the breakdown layer. As a result, the placement, size, and number of ruptures in the breakdown layer are more consistent over a series or array of devices. The variable resistance material may be a phase-change material. The variable-thickness breakdown layer may be formed through a diffusion process by introducing a gas containing a resistivity-enhancing species to the environment of segmented variable resistance devices during fabrication. The resistivity-enhancing element penetrates the outer perimeter of the variable resistance material and diffuses toward the interior of the device.

Abstract: A chalcogenide material is proposed for programming the cross-connect transistor coupling interconnect lines of an electrically programmable matrix array. Leakage may be reduced by optionally placing a thin insulating breakdown layer in series with the select device or a phase change material. The matrix array may be used in a programmable logic device.

Abstract: An electronic system includes at least one reduced-complexity integrated circuit memory coupled to a memory controller. By reducing the complexity of each integrated circuit memory and concentrating the complexity within the memory controller, overall system costs may be greatly reduced and reliability improved.

Abstract: A three-dimensional phase-change memory array. In one embodiment of the invention, the memory array includes a first plurality of diodes, a second plurality of diodes disposed above the first plurality of diodes, a first plurality phase-change memory elements disposed above the first and second plurality of diodes and a second plurality of memory elements disposed above the first plurality of memory elements.

Abstract: A radio frequency identification device includes an integrated circuit including a receiver, a transmitter, and a microprocessor. The receiver and transmitter together define an active transponder. The integrated circuit is preferably a monolithic single die integrated circuit including the receiver, the transmitter, and the microprocessor. Because the device includes an active transponder, instead of a transponder which relies on magnetic coupling for power, the device has a much greater range.

Abstract: Fixed-voltage programming pulses are employed to program a phase change memory cell. A burst of incrementally widening fixed-voltage programming pulses may be employed to program a phase change memory to a target threshold voltage.