Abstract: A cordless appliance includes a blender having a base unit with a housing and an upwardly opening upper cavity. A drive connection is positioned within the upwardly opening upper cavity. The housing further includes a battery-receiving cavity that is configured to receive a removable battery. A motor is disposed within the housing of the base unit it is contemplated to be powered by the removable battery. A blender jar includes an upper collar in an interior cavity. A first lid assembly is configured to be coupled to the upper collar of the blender jar and includes a blade assembly and a drive connecting member. A second lid assembly includes a cap member removably received on an open aperture of the second lid assembly. The first and second lid assemblies are configured for limited rotation with respect to the blender jar for engagement of the same.

Abstract: An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system (e.g., Internet Protocol (IP), layer-3 switches and ATM switches using E.164 addressing) addresses for identifying the source and destination of each digital packet data.

Abstract: An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system (e.g., Internet Protocol (IP), layer-3 switches and ATM switches using E.164 addressing) addresses for identifying the source and destination of each digital packet data.

Abstract: An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system (e.g., Internet Protocol (IP), layer-3 switches and ATM switches using E.164 addressing) addresses for identifying the source and destination of each digital packet data.

Abstract: An apparatus and method that utilizes partial ordering of ternary hierarchical addresses and their associated masks entries in both binary and ternary content addressable memories (CAMs) for providing fast searches and while reducing address table size used in the processing of communication system (e.g., Internet Protocol (IP), layer-3 switches and ATM switches using E.164 addressing) addresses for identifying the source and destination of each digital packet data.