Patents by Inventor Tyler J. Lockman

Tyler J. Lockman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for mapping source elements to destination elements as interconnect routing assignments
    Patent number: 8122397
    Abstract: Aspects for optimized mapping of source elements to destination elements as interconnect routing assignments are described. The aspects include utilizing chosen rules to establish a priority for mapping, and generating mapping assignments based on the priority. The mapping assignments are recursively refined to converge on an optimized solution.
    Type: Grant
    Filed: December 9, 2008
    Date of Patent: February 21, 2012
    Assignee: Cadence Design Systems, Inc.
    Inventors: Tyler J. Lockman, Phuong Ha-Uyen Landry
  • Method and System for Mapping Source Elements to Destination Elements as Interconnect Routing Assignments
    Publication number: 20090089722
    Abstract: Aspects for optimized mapping of source elements to destination elements as interconnect routing assignments are described. The aspects include utilizing chosen rules to establish a priority for mapping, and generating mapping assignments based on the priority. The mapping assignments are recursively refined to converge on an optimized solution.
    Type: Application
    Filed: December 9, 2008
    Publication date: April 2, 2009
    Applicant: Cadence design systems, Inc.
    Inventors: Tyler J. Lockman, Phuong Ha-Uyen Landry
  • Method and system for mapping source elements to destination elements as interconnect routing assignments
    Patent number: 7464348
    Abstract: Aspects for optimized mapping of source elements to destination elements as interconnect routing assignments are described. The aspects include utilizing chosen rules to establish a priority for mapping, and generating mapping assignments based on the priority. The mapping assignments are recursively refined to converge on an optimized solution.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: December 9, 2008
    Assignee: Cadence Design Systems, Inc.
    Inventors: Tyler J. Lockman, Phuong Ha-Uyen Landry