Abstract: Disclosed is a master device which is capable of communicating with a salve device via a two-wire bus having a clock line and a data line. The master device includes a data port, a clock port and an output port. The output port is also coupled to the clock line. When the clock is held by the slave device for exceeding a predetermined stretching period, the output port can transmit at least one clock pulse generated by the master device to the slave device through the clock line to prevent transmission failure or data corruption. The master device checks each time whether or not a response is received via the data port after the output port transmits the clock pulse generated by the master device. The response represents that releasing the clock is confirmed. Then, the data port transmits a stop pulse after releasing the clock.

Abstract: A KVM switch capable of providing real EDID of a display, rather than default EDID, to a computer coupled thereto. The KVM switch includes a processor, at least one memory and at least one switch. The processor queries EDID of the display when the KVM switch is booted and stores the EDID in the memory. The switch couples the computer to the display or the memory to provide the EDID of the display or from the memory to the computer. When the EDID is not available from the memory, the switch couples the computer to the display. When the EDID is not available from the display, the switch couples the computer to the memory. The KVM switch further includes a multiplexer. The multiplexer couples the processor to at least one memory for transferring the EDID of the display to the memory at a time.

Abstract: A remote control device which makes a first computing device capable of accessing a peripheral device connected to a second computing device is disclosed. The remote control device has a network interface circuit, a peripheral device controller and a processor. The network interface circuit is capable of connection to the second computing device via a network. The peripheral device controller is electrically connected to the network interface circuit. The processor is electrically connected to the network interface circuit and the peripheral device controller, and the peripheral device is emulated for the first computing device according to device information of the peripheral device.