Patents by Inventor Tyrone Kwok

Tyrone Kwok has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Systems and methods for performing parallel digital phase-locked-loop
    Patent number: 8379788
    Abstract: A parallel phase locked loop (PLL) system includes a first chain of a plurality of pre-locking PLLs that operates from a free-run state to a locked state; and a second chain of a plurality of PLLs to work from the locked-state to recover signal output.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: February 19, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Junquiang Hu, Tyrone Kwok, Ting Wang
  • Method for source synchronous high-speed signal synchronization
    Patent number: 8358726
    Abstract: A source synchronous signal synchronization system includes a differential signal receiver; a tunable input delay element coupled to the receiver; an input serializer/deserializer (ISerDes) coupled to the tunable input delay; an alignment unit coupled to the ISerDes; and a delay control unit coupled to the tunable input delay, the ISerDes, and the alignment unit.
    Type: Grant
    Filed: June 11, 2010
    Date of Patent: January 22, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Junquiang Hu, Tyrone Kwok, Ting Wang
  • SYSTEMS AND METHODS FOR PERFORMING PARALLEL DIGITAL PHASE-LOCKED-LOOP
    Publication number: 20110310998
    Abstract: A parallel phase locked loop (PLL) system includes a first chain of a plurality of pre-locking PLLs that operates from a free-run state to a locked state; and a second chain of a plurality of PLLs to work from the locked-state to recover signal output.
    Type: Application
    Filed: June 18, 2010
    Publication date: December 22, 2011
    Applicant: NEC LABORATORIES AMERICA, INC.
    Inventors: Junqiang Hu, Tyrone Kwok, Ting Wang
  • METHOD FOR SOURCE SYNCHRONOUS HIGH-SPEED SIGNAL SYNCHRONIZATION
    Publication number: 20110304369
    Abstract: A source synchronous signal synchronization system includes a differential signal receiver; a tunable input delay element coupled to the receiver; an input serializer/deserializer (ISerDes) coupled to the tunable input delay; an alignment unit coupled to the ISerDes; and a delay control unit coupled to the tunable input delay, the ISerDes, and the alignment unit.
    Type: Application
    Filed: June 11, 2010
    Publication date: December 15, 2011
    Applicant: NEC LABORATORIES AMERICA, INC.
    Inventors: Junqiang Hu, Tyrone Kwok, Ting Wang