Abstract: One embodiment of the present invention sets forth a system for computing and error checking configuration parameters related to raster image generation within a graphics processing unit. Input parameters are validated by a hardware-based error checking engine. A hardware-based pre-calculation engine uses validated input parameters to compute additional private configuration parameters used by the raster image generation circuitry within a graphics processing unit.

Abstract: One embodiment of the present invention sets forth a protocol for packing and transferring pixel data between integrated circuits. The data transfer protocol may be used between a graphics processing unit and a video output encoder unit. The data transfers may include up to 20 pixels per arbitration cycle. By packing pixel data for transfer over a bus with a relatively small set of output pins, overall package pin count is reduced, while maintaining sufficient bandwidth to carry the pixel data the output pins. By moving the analog circuitry to a separate device, linked to the GPU via the bus, noise from the GPU may be effectively mitigate through physical separation.

Abstract: One embodiment of the present invention sets forth a system for computing and error checking configuration parameters related to raster image generation within a graphics processing unit. Input parameters are validated by a hardware-based error checking engine. A hardware-based pre-calculation engine uses validated input parameters to compute additional private configuration parameters used by the raster image generation circuitry within a graphics processing unit.

Abstract: A method and an apparatus are provided for isolating faulty semiconductor devices in a multiple stream graphics system. The apparatus includes a buffer adapted to receive a plurality of data streams. The apparatus further includes a convolver comprising at least one convolution signature register; a router adapted to route the data streams from the buffer to the convolver, wherein the router comprises at least one router signature register; and an analyzer adapted to access the convolution and router signature registers, wherein the analyzer is capable of isolating at least one of a faulty semiconductor device and a faulty interconnection using the contents of the convolution and router signature registers.

Abstract: A method and an apparatus are provided for isolating faulty semiconductor devices in a multiple format graphics system. The apparatus includes a buffer adapted to receive at least one data stream in at least one of a plurality of formats and a convolver comprising at least one signature register, wherein the convolver is adapted to determine the format of the at least one data stream. The apparatus further includes a router adapted to route the data stream from the buffer to the convolver and an analyzer adapted to access the signature register, wherein the analyzer is capable of isolating at least one of a faulty semiconductor device and a faulty interconnect based upon the contents of the signature register and the determined format.

Abstract: A method and an apparatus are provided for isolating faulty semiconductor devices in a multiple stream graphics system. The apparatus includes a buffer adapted to receive a data stream and a convolver comprising at least one signature register, wherein the signature register is adapted to store a plurality of bits. The apparatus further includes a router adapted to route the data stream from the buffer to the convolver and an analyzer adapted to access the signature registers, wherein the analyzer is capable of isolating at least one of a faulty semiconductor device and a faulty interconnect using the plurality of bits stored in the signature register.

Abstract: A method and an apparatus are provided for isolating faulty semiconductor devices in a multiple stream graphics system. The apparatus includes a buffer adapted to receive a plurality of data streams. The apparatus further includes a convolver comprising at least one convolution signature register; a router adapted to route the data streams from the buffer to the convolver, wherein the router comprises at least one router signature register; and an analyzer adapted to access the convolution and router signature registers, wherein the analyzer is capable of isolating at least one of a faulty semiconductor device and a faulty interconnection using the contents of the convolution and router signature registers.