Patents by Inventor Tzachi Noy

Tzachi Noy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Skew-balancing algorithm for digital circuitry
    Patent number: 11556145
    Abstract: A method for minimizing the skew (balancing) between all paths arriving at the inputs ports of each gate within a given combinatorial circuit.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: January 17, 2023
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Adam Teman, Yehuda Kra, Tzachi Noy
  • SKEW-BALANCING ALGORITHM FOR DIGITAL CIRCUITRY
    Publication number: 20220050492
    Abstract: A method for minimizing the skew (balancing) between all paths arriving at the inputs ports of each gate within a given combinatorial circuit.
    Type: Application
    Filed: March 3, 2021
    Publication date: February 17, 2022
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Adam Teman, Yehuda Kra, Tzachi Noy
  • Refresh controller for first-in first-out memories
    Patent number: 10803920
    Abstract: A method of operating a first-in-first-out memory, called a FIFO, includes performing write and read operations of data with a FIFO. The FIFO has a size fifo_size and a maximum retention time. Once a datum is written to the FIFO, there is a limit of fifo_size-1 write operations before the datum becomes invalid and there is a limit of fifo_size-1 read operations before the datum is read, and the data is refreshed before reaching the maximum retention time. During the refreshing, the FIFO is available for further write and read operations.
    Type: Grant
    Filed: November 26, 2018
    Date of Patent: October 13, 2020
    Assignee: Birad—Research & Development Company Ltd.
    Inventors: Adam Teman, Tzachi Noy
  • REFRESH CONTROLLER FOR FIRST-IN FIRST-OUT MEMORIES
    Publication number: 20200168270
    Abstract: A method of operating a first-in-first-out memory, called a FIFO, includes performing write and read operations of data with a FIFO. The FIFO has a size fifo_size and a maximum retention time. Once a datum is written to the FIFO, there is a limit of fifo_size-1 write operations before the datum becomes invalid and there is a limit of fifo_size-1 read operations before the datum is read, and the data is refreshed before reaching the maximum retention time. During the refreshing, the FIFO is available for further write and read operations.
    Type: Application
    Filed: November 26, 2018
    Publication date: May 28, 2020
    Applicant: Birad - Research & Development Company Ltd.
    Inventors: Adam Teman, Tzachi Noy