Patents by Inventor Tze-Chien Wang
Tze-Chien Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230228813Abstract: The present invention provides a glitch detector including a first inverter, a second inverter, a first capacitor and a second capacitor. The first inverter is connected between a supply voltage and a ground voltage, and is configured to receive a first signal at a first node to generate a second signal to a second node. The second inverter is connected between the supply voltage and the ground voltage, and is configured to receive the second signal at the second node to generate the first signal to the first node. A first electrode of the first capacitor is coupled to the supply voltage, and a second electrode of the first capacitor is coupled to the first node. A first electrode of the second capacitor is coupled to the ground voltage, and a second electrode of the second capacitor is coupled to the second node.Type: ApplicationFiled: November 18, 2022Publication date: July 20, 2023Applicant: MEDIATEK INC.Inventor: Tze-Chien Wang
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Patent number: 10461702Abstract: The present invention provides an amplifier circuit, wherein the amplifier circuit includes an operational amplifier and a feedback path. The operational amplifier has an input terminal and an output terminal, and is arranged for receiving an input signal to generate an output signal. The feedback path is coupled between the input terminal and the output terminal of the operational amplifier, wherein the feedback path comprises at least two poly resistors, and a depletion region of at least one of the two poly resistors is biased by the output signal generated by the operational amplifier.Type: GrantFiled: March 5, 2018Date of Patent: October 29, 2019Assignee: MEDIATEK INC.Inventors: Tsun-Yuan Fan, Tze-Chien Wang
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Publication number: 20180309415Abstract: The present invention provides an amplifier circuit, wherein the amplifier circuit includes an operational amplifier and a feedback path. The operational amplifier has an input terminal and an output terminal, and is arranged for receiving an input signal to generate an output signal. The feedback path is coupled between the input terminal and the output terminal of the operational amplifier, wherein the feedback path comprises at least two poly resistors, and a depletion region of at least one of the two poly resistors is biased by the output signal generated by the operational amplifier.Type: ApplicationFiled: March 5, 2018Publication date: October 25, 2018Inventors: Tsun-Yuan Fan, Tze-Chien Wang
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Patent number: 9806703Abstract: A single-ended to differential conversion circuit for converting an input signal into a pair of differential signals is provided. An amplifier includes an inverting input terminal, a non-inverting input terminal for receiving a reference signal, and an output terminal. A first resistor is coupled between the inverting input terminal and the output terminal of the amplifier. A second resistor is coupled to the inverting input terminal of the amplifier. The third resistor is coupled to the output terminal of the amplifier. The resistor string is coupled between the output terminal of the amplifier and the second resistor, and includes a fourth resistor and a fifth resistor connected in series. A signal of the pair of differential signals is provided via the third resistor, and another signal of the pair of differential signals is provided via the resistor string.Type: GrantFiled: October 31, 2016Date of Patent: October 31, 2017Assignee: MEDIATEK INC.Inventors: Yu-Hsin Lin, Tze-Chien Wang
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Publication number: 20170070216Abstract: A single-ended to differential conversion circuit for converting an input signal into a pair of differential signals is provided. An amplifier includes an inverting input terminal, a non-inverting input terminal for receiving a reference signal, and an output terminal. A first resistor is coupled between the inverting input terminal and the output terminal of the amplifier. A second resistor is coupled to the inverting input terminal of the amplifier. The third resistor is coupled to the output terminal of the amplifier. The resistor string is coupled between the output terminal of the amplifier and the second resistor, and includes a fourth resistor and a fifth resistor connected in series. A signal of the pair of differential signals is provided via the third resistor, and another signal of the pair of differential signals is provided via the resistor string.Type: ApplicationFiled: October 31, 2016Publication date: March 9, 2017Inventors: Yu-Hsin LIN, Tze-Chien WANG
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Patent number: 9559674Abstract: A latch circuit includes an input stage, an amplifying stage and a clock gating circuit. The input stage is arranged for receiving at least a clock signal and a data control signal. The amplifying stage is coupled to the input stage and supplied by a supply voltage and a ground voltage, and is arranged for retaining a data value and outputting the data value according to the clock signal and the data control signal. The clock gating circuit is coupled to the amplifying stage, and is arranged for avoiding a short-circuit current between the supply voltage and the ground voltage.Type: GrantFiled: February 16, 2016Date of Patent: January 31, 2017Assignee: MEDIATEK INC.Inventors: Chen-Yen Ho, Yu-Hsin Lin, Hung-Chieh Tsai, Tze-Chien Wang
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Patent number: 9537497Abstract: A continuous time delta sigma modulator includes a summing circuit, a loop filter, an extraction circuit, a quantizer and a digital to analog converter. The summing circuit is arranged for subtracting a feedback signal by an input signal to generate a residual signal. The loop filter includes a plurality of amplifying stages connected in series and is arranged to receive the residual signal to generate a filtered residual signal. The extraction circuit is arranged for extracting a current from one of the amplifying stages and forwarding the extracted current to a following one of the amplifying stages. The quantizer is arranged for generating a digital output signal according to the filtered residual signal. The digital to analog converter is arranged for performing a digital to analog converting operation upon a signal derived from the digital output signal to generate the feedback signal to the summing circuit.Type: GrantFiled: February 16, 2016Date of Patent: January 3, 2017Assignee: MEDIATEK INC.Inventors: Chen-Yen Ho, Yu-Hsin Lin, Tze-Chien Wang
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Patent number: 9490835Abstract: A modulation circuit includes a digital quantizer and a compensation circuit. The digital quantizer is utilized to receive and truncate a digital quantizing input signal for generating a digital quantizing output signal. The compensation circuit compensates for a time delay of the modulation circuit and generates a compensation output signal. The digital quantizing input signal is generated by subtracting the compensation output signal from a digital integration output signal to compensate for the time delay before truncating the digital quantizing input signal.Type: GrantFiled: January 23, 2015Date of Patent: November 8, 2016Assignee: MEDIATEK INC.Inventor: Tze-Chien Wang
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Publication number: 20150358029Abstract: A modulation circuit includes a digital quantizer and a compensation circuit. The digital quantizer is utilized to receive and truncate a digital quantizing input signal for generating a digital quantizing output signal. The compensation circuit compensates for a time delay of the modulation circuit and generates a compensation output signal. The digital quantizing input signal is generated by subtracting the compensation output signal from a digital integration output signal to compensate for the time delay before truncating the digital quantizing input signal.Type: ApplicationFiled: January 23, 2015Publication date: December 10, 2015Inventor: Tze-Chien WANG
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Publication number: 20150333716Abstract: A method and an apparatus for performing signal amplifying with aid of switching control are provided, where the method may include the steps of: modulating an input signal of a gain stage based on one of several modulation schemes to generate at least one first amplified result of a first amplifying path of the gain stage; modulating the input signal of the gain stage based on one of the several modulation schemes to generate at least one second amplified result of a second amplifying path of the gain stage; and generating an amplified signal of the gain stage based on at least the first amplified result and the second amplified result. In addition, at least one switching time point of the first amplifying path for switching between the several modulation schemes and one switching time point of the second amplifying path for switching between the several modulation schemes are non-overlapped.Type: ApplicationFiled: May 13, 2014Publication date: November 19, 2015Applicant: MEDIATEK INC.Inventor: Tze-Chien Wang
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Patent number: 7663429Abstract: A driver amplifier circuit is provided which includes a voltage level shifting circuit and an Op-Amp. A positive power supply terminal and a negative power supply terminal of the Op-Amp receive a first reference voltage and a second reference voltage outputted from the voltage level shifting circuit, causing a DC voltage level of an output signal to be equal to 0V. Meanwhile, the absolute value of a voltage difference between the first reference voltage and the second reference voltage is equal to VDD, meaning that elements in the circuit operate without risking a high-voltage damage.Type: GrantFiled: February 14, 2008Date of Patent: February 16, 2010Assignee: Realtek Semiconductor Corp.Inventor: Tze-Chien Wang
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Patent number: 7548121Abstract: A fractional frequency synthesizer, applied to a phase-locked loop, includes a phase detector, a loop filter, a controllable oscillator, a first frequency divider, and a sigma-delta modulator (SDM). The phase detector generates a phase difference signal according to a reference signal and a feedback signal. The loop filter filters the phase difference signal to generate a filtered signal. The controllable oscillator generates the frequency signal according to the filtered signal. The first frequency divider generates the feedback signal by dividing a frequency of the frequency signal according to a dividing factor. The SDM determines the dividing factor according to a control signal.Type: GrantFiled: August 18, 2006Date of Patent: June 16, 2009Assignee: Realtek Semiconductor Corp.Inventors: Wen-Chi Wang, Tze-Chien Wang
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Patent number: 7498881Abstract: A switching audio power amplifier and a method for pop noise suppression. The switching audio power amplifier includes a pulse width modulation (PWM) signal generator for generating a PWM signal; a counter for generating counting values k1˜kN in N time intervals according to the PWM signal; N switch transistors connected in parallel and controlled by the counting values k1˜kN to turn on and off; and an impedance switching unit, which has a gate for receiving a switching audio signal and one terminal coupled to the switch transistors, and outputs a signal from the terminal. Because the N switch transistors are turned on or off one by one at different timings, the switching audio power amplifier of the invention can effectively suppress the pop noise.Type: GrantFiled: June 25, 2007Date of Patent: March 3, 2009Assignee: Realtek Semiconductor Corp.Inventor: Tze-Chien Wang
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Patent number: 7495490Abstract: An apparatus includes a first trigger, a second trigger, a pulse generator, and a control unit. The first trigger generates a first trigger signal and a first level signal; the second trigger generates a second trigger signal and a second level signal; the pulse generator generates a digital output signal according to the first and the second level signals; and the control unit outputs the first and the second control voltages according to the digital input signal and the digital output signal.Type: GrantFiled: February 13, 2007Date of Patent: February 24, 2009Assignee: Realtek Semiconductor Corp.Inventors: Tze-Chien Wang, Wen-Chi Wang
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Patent number: 7466182Abstract: In many high voltage circuits, it often needs to shift the logic voltage level to keep the circuit normal operation. In the class-D amplifier circuitry, it needs to shift the voltage level of pulse width modulation (PWM) signal to control the connecting of different power switches. In other applications, such as a driver to drive amplifier of an audio device, it also needs a level shift circuit to maintain the circuitry in normal voltage operation. Therefore, this invention is to provide a novel level shift circuit with high performance, low cost and low power dissipation characteristics.Type: GrantFiled: October 5, 2006Date of Patent: December 16, 2008Assignee: Realtek Semiconductor Corp.Inventor: Tze-Chien Wang
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Publication number: 20080197907Abstract: A driver amplifier circuit is provided which includes a voltage level shifting circuit and an Op-Amp. A positive power supply terminal and a negative power supply terminal of the Op-Amp receive a first reference voltage and a second reference voltage outputted from the voltage level shifting circuit, causing a DC voltage level of an output signal to be equal to 0V. Meanwhile, the absolute value of a voltage difference between the first reference voltage and the second reference voltage is equal to VDD, meaning that elements in the circuit operate without risking a high-voltage damage.Type: ApplicationFiled: February 14, 2008Publication date: August 21, 2008Applicant: REALTEK SEMICONDUCTOR CORP.Inventor: Tze-Chien WANG
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Publication number: 20080024216Abstract: A switching audio power amplifier and a method for pop noise suppression. The switching audio power amplifier includes a pulse width modulation (PWM) signal generator for generating a PWM signal; a counter for generating counting values k1˜kN in N time intervals according to the PWM signal; N switch transistors connected in parallel and controlled by the counting values k1˜kN to turn on and off; and an impedance switching unit, which has a gate for receiving a switching audio signal and one terminal coupled to the switch transistors, and outputs a signal from the terminal. Because the N switch transistors are turned on or off one by one at different timings, the switching audio power amplifier of the invention can effectively suppress the pop noise.Type: ApplicationFiled: June 25, 2007Publication date: January 31, 2008Inventor: Tze-Chien Wang
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Publication number: 20070194972Abstract: An apparatus includes a first trigger, a second trigger, a pulse generator, and a control unit. The first trigger generates a first trigger signal and a first level signal; the second trigger generates a second trigger signal and a second level signal; the pulse generator generates a digital output signal according to the first and the second level signals; and the control unit outputs the first and the second control voltages according to the digital input signal and the digital output signal.Type: ApplicationFiled: February 13, 2007Publication date: August 23, 2007Inventors: Tze-Chien Wang, Wen-Chi Wang
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Publication number: 20070085590Abstract: In many high voltage circuits, it often needs to shift the logic voltage level to keep the circuit normal operation. In the class-D amplifier circuitry, it needs to shift the voltage level of pulse width modulation (PWM) signal to control the connecting of different power switches. In other applications, such as a driver to drive amplifier of an audio device, it also needs a level shift circuit to maintain the circuitry in normal voltage operation. Therefore, this invention is to provide a novel level shift circuit with high performance, low cost and low power dissipation characteristics.Type: ApplicationFiled: October 5, 2006Publication date: April 19, 2007Inventor: Tze-Chien Wang
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Publication number: 20070040940Abstract: A fractional frequency synthesizer, applied to a phase-locked loop, includes a phase detector, a loop filter, a controllable oscillator, a first frequency divider, and a sigma-delta modulator (SDM). The phase detector generates a phase difference signal according to a reference signal and a feedback signal. The loop filter filters the phase difference signal to generate a filtered signal. The controllable oscillator generates the frequency signal according to the filtered signal. The first frequency divider generates the feedback signal by dividing a frequency of the frequency signal according to a dividing factor. The SDM determines the dividing factor according to a control signal.Type: ApplicationFiled: August 18, 2006Publication date: February 22, 2007Inventors: Wen-Chi Wang, Tze-Chien Wang