Abstract: A I/O transmitter circuitry for supporting multi-modes serialization comprising a serializer, wherein said serializer comprising a multiple FIFO buffers, a multiple flip-flops including a first latch, a second latch, a third flop and a fourth flop, to hold data ready and stage the data for subsequent muxing, a 0-degree shifted clock and a 90-degree shifted clock and a multiplexer, wherein a read pointer reads one bit of data from each of the FIFO buffers, wherein the data is sampled into the respective flip-flops according to frequency of the 0-degree shifted clock and 90-degree shifted clock, wherein the data is outputted by the 0-degree shifted clock and 90-degree shifted clock via the multiplexer.