Patents by Inventor Tzi-Yi Shieh
Tzi-Yi Shieh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11850702Abstract: In some embodiments, the present disclosure relates to a chemical mechanical planarization (CMP) tool. The CMP tool includes a carrier and a malleable membrane coupled to the carrier and having a lower surface facing away from the carrier. The lower surface of the malleable membrane includes a first malleable material within a central region of the lower surface and a second malleable material within a peripheral region of the lower surface, which surrounds the central region. The first malleable material provides the central region of the lower surface with a first stiffness and the second malleable material provides the peripheral region of the lower surface with a second stiffness that is different than the first stiffness.Type: GrantFiled: March 3, 2022Date of Patent: December 26, 2023Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Ping Chen, Ren-Dou Lee, Sheng-Tai Peng, Tsung-Lung Lai, Tzi-Yi Shieh, Chien-Wei Chang
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Publication number: 20220184773Abstract: In some embodiments, the present disclosure relates to a chemical mechanical planarization (CMP) tool. The CMP tool includes a carrier and a malleable membrane coupled to the carrier and having a lower surface facing away from the carrier. The lower surface of the malleable membrane includes a first malleable material within a central region of the lower surface and a second malleable material within a peripheral region of the lower surface, which surrounds the central region. The first malleable material provides the central region of the lower surface with a first stiffness and the second malleable material provides the peripheral region of the lower surface with a second stiffness that is different than the first stiffness.Type: ApplicationFiled: March 3, 2022Publication date: June 16, 2022Inventors: Cheng-Ping Chen, Ren-Dou Lee, Sheng-Tai Peng, Tsung-Lung Lai, Tzi-Yi Shieh, Chien-Wei Chang
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Publication number: 20220102285Abstract: The current disclosure describes techniques for making an alignment mark on a wafer. A recess is etched in a first surface region of a wafer. A device structure is formed in a second surface region of the wafer. A dielectric layer is deposited on the first surface of the wafer and filling the recess. A first planarization procedure is conducted to planarize the dielectric layer. After the first planarization procedure, a second planarization procedure is conducted to device structures on the second surface region of the wafer.Type: ApplicationFiled: July 7, 2021Publication date: March 31, 2022Inventors: Huang-Jen HSU, Jheng-Si SU, Kun-Ming LIU, Tzi-Yi SHIEH, Feng-Inn WU
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Patent number: 11267099Abstract: In some embodiments, the present disclosure, in some embodiments, relates to a method of forming a CMP membrane. The method is performed by providing a malleable material within a cavity within a membrane mold. The cavity has a central region and a peripheral region surrounding the central region. The malleable material within the cavity is cured to form a membrane. Curing the malleable material is performed by heating the malleable material within the central region of the membrane mold to a first temperature and heating the malleable material within the peripheral region of the membrane mold to a second temperature that is greater than the first temperature.Type: GrantFiled: May 31, 2018Date of Patent: March 8, 2022Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Ping Chen, Ren-Dou Lee, Sheng-Tai Peng, Tsung-Lung Lai, Tzi-Yi Shieh, Chien-Wei Chang
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Publication number: 20210407819Abstract: In a method of manufacturing a semiconductor device, a sacrificial gate structure is formed over a substrate. The sacrificial gate structure includes a sacrificial gate electrode. A first dielectric layer is formed over the sacrificial gate structure. A second dielectric layer is formed over the first dielectric layer. The second and first dielectric layers are planarized and recessed, and an upper portion of the sacrificial gate structure is exposed while a lower portion of the sacrificial gate structure is embedded in the first dielectric layer. A third dielectric layer is formed over the exposed sacrificial gate structure and over the first dielectric layer. A fourth dielectric layer is formed over the third dielectric layer. The fourth and third dielectric layers are planarized, and the sacrificial gate electrode is exposed and part of the third dielectric layer remains on the recessed first dielectric layer. The sacrificial gate electrode is removed.Type: ApplicationFiled: January 29, 2021Publication date: December 30, 2021Inventors: Yu-Chen Wei, Feng-Inn WU, Tzi-Yi SHIEH
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Patent number: 11000923Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.Type: GrantFiled: October 31, 2017Date of Patent: May 11, 2021Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Yen Chen, Tzi-Yi Shieh, Yuh-Sen Chang, Chung-Li Lee
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Publication number: 20190091829Abstract: In some embodiments, the present disclosure, in some embodiments, relates to a method of forming a CMP membrane. The method is performed by providing a malleable material within a cavity within a membrane mold. The cavity has a central region and a peripheral region surrounding the central region. The malleable material within the cavity is cured to form a membrane. Curing the malleable material is performed by heating the malleable material within the central region of the membrane mold to a first temperature and heating the malleable material within the peripheral region of the membrane mold to a second temperature that is greater than the first temperature.Type: ApplicationFiled: May 31, 2018Publication date: March 28, 2019Inventors: Cheng-Ping Chen, Ren-Dou Lee, Sheng-Tai Peng, Tsung-Lung Lai, Tzi-Yi Shieh, Chien-Wei Chang
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Publication number: 20180050425Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.Type: ApplicationFiled: October 31, 2017Publication date: February 22, 2018Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Shih-Yen CHEN, Tzi-Yi SHIEH, Yuh-Sen CHANG, Chung-Li LEE
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Patent number: 9808891Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit. The wafer lifting system is configured to receive and move the wafer in the chamber unit, and to provide a vertical distance between the heater and the wafer in the chamber unit.Type: GrantFiled: January 16, 2014Date of Patent: November 7, 2017Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shih-Yen Chen, Tzi-Yi Shieh, Yuh-Sen Chang, Chung-Li Lee
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Patent number: 9209048Abstract: Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a method including mounting a die to a top surface of a substrate to form a device, encapsulating the die and top surface of the substrate in a mold compound, the mold compound having a first thickness over the die, and removing a portion, but not all, of the thickness of the mold compound over the die. The method further includes performing further processing on the device, and removing the remaining thickness of the mold compound over the die.Type: GrantFiled: May 13, 2014Date of Patent: December 8, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Wen-Chun Huang, Chien-Chen Li, Kuo-Chio Liu, Ruey-Yun Shiue, Hsi-Kuei Cheng, Chih-Hsien Lin, Jing-Cheng Lin, Hsiang-Tai Lu, Tzi-Yi Shieh
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Publication number: 20150201502Abstract: A tool and a method of reflow are provided. In various embodiments, the tool includes a chamber unit, a wafer lifting system, a heater, and an exhausting unit. The wafer lifting system is disposed in the chamber unit. The heater is coupled to the chamber unit, and configured to heat the wafer. The exhausting unit coupled to the chamber unit, and configured to exhaust gas in the chamber unit.Type: ApplicationFiled: January 16, 2014Publication date: July 16, 2015Applicant: Taiwan Semiconductor Manufacturing CO., LTD.Inventors: Shih-Yen Chen, Tzi-Yi Shieh, Yuh-Sen Chang, Chung-Li Lee
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Publication number: 20150187607Abstract: Embodiments of the present disclosure include semiconductor packages and methods of forming the same. An embodiment is a method including mounting a die to a top surface of a substrate to form a device, encapsulating the die and top surface of the substrate in a mold compound, the mold compound having a first thickness over the die, and removing a portion, but not all, of the thickness of the mold compound over the die. The method further includes performing further processing on the device, and removing the remaining thickness of the mold compound over the die.Type: ApplicationFiled: May 13, 2014Publication date: July 2, 2015Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Wen-Chun Huang, Chien-Chen Li, Kuo-Chio Liu, Ruey-Yun Shiue, Hsi-Kuei Cheng, Chih-Hsien Lin, Jing-Cheng Lin, Hsiang-Tai Lu, Tzi-Yi Shieh