Patents by Inventor Tzoyao Chan
Tzoyao Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7206943Abstract: Keys (e.g., decryption key, authentication key) are stored in a non-volatile memory of a display unit. The keys are retrieved in encrypted form into an integrated circuit. The integrated circuit decrypts the keys and uses the keys. As the keys are available in decrypted form only within the integrated circuit and potentially only during use, the keys may not be available to unauthorized third parties.Type: GrantFiled: March 29, 2004Date of Patent: April 17, 2007Assignee: Genesis Microchip Inc.Inventors: Osamu Kobayashi, Ali Noorbakhsh, Chia-Lun Hang, Jih-Hsien Soong, Tzoyao Chan
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Patent number: 6845450Abstract: Keys (e.g., decryption key, authentication key) are stored in a non-volatile memory of a display unit. The keys are retrieved in encrypted form into an integrated circuit. The integrated circuit decrypts the keys and uses the keys. As the keys are available in decrypted form only within the integrated circuit and potentially only during use, the keys may not be available to unauthorized third parties.Type: GrantFiled: August 31, 2000Date of Patent: January 18, 2005Assignee: Genesis Microchip Inc.Inventors: Osamu Kobayashi, Ali Noorbakhsh, Chia-Lun Hang, Jih-Hsien Soong, Tzoyao Chan
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Publication number: 20040186991Abstract: Keys (e.g., decryption key, authentication key) are stored in a non-volatile memory of a display unit. The keys are retrieved in encrypted form into an integrated circuit. The integrated circuit decrypts the keys and uses the keys. As the keys are available in decrypted form only within the integrated circuit and potentially only during use, the keys may not be available to unauthorized third parties.Type: ApplicationFiled: March 29, 2004Publication date: September 23, 2004Applicant: Genesis Microchip CorporationInventors: Osamu Kobayashi, Ali Noorbakhsh, Chia-Lun Hang, Jih-Hsien Soong, Tzoyao Chan
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Patent number: 6765563Abstract: A monolithic integrated circuit for use in a digital display unit. The circuit may include an analog-to-digital converter (ADC), a scaler and a clock recovery circuit. The present invention enables the integration of at least these components into a single monolithic integrated circuit while maintaining reasonable display quality. Specifically, the monolithic integrated circuit is designed for substantial immunity from noise, which may otherwise result from integration.Type: GrantFiled: April 1, 2002Date of Patent: July 20, 2004Assignee: Genesis Microchip Inc.Inventors: Alexander Julian Eglit, Tzoyao Chan, John Lattanzi
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Patent number: 6459426Abstract: A monolithic integrated circuit for use in a digital display unit. The circuit may include an analog-to-digital converter (ADC), a scaler and a clock recovery circuit. The present invention enables the integration of at least these components into a single monolithic integrated circuit while maintaining reasonable display quality. Specifically, the monolithic integrated circuit is designed for substantial immunity from noise, which may otherwise result from integration.Type: GrantFiled: August 17, 1998Date of Patent: October 1, 2002Assignee: Genesis Microchip (Delaware) Inc.Inventors: Alexander Julian Eglit, Tzoyao Chan, John Lattanzi
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Publication number: 20020113491Abstract: A structure is provided for installing in a motorcycle an anti-theft device capable of reporting its position by wirelessly transmitting at least identifying information utilizing the GPS or PHS positioning system. The structure includes a receptacle and an openable cover that can be locked to secure the receptacle, and the anti-theft device is installed in the receptacle. The receptacle can be a helmet box formed in the motor cycle and cover the can be an openable and lockable motorcycle seat. The structure conceals the anti-theft device, protects it from vibration and invasion of rainwater, and can include a case with enhanced waterproofing capability in which the anti-theft device is accommodated so that an indicator thereof is visible through a transparent window.Type: ApplicationFiled: April 1, 2002Publication date: August 22, 2002Applicant: Genesis Microchip Corporation of AlivisoInventors: Alexander Julian Eglit, Tzoyao Chan, John Lattanzi
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Patent number: 5923665Abstract: A multimedia system includes an audio/video decompresser/decoder for decompressing/decoding a compressed/encoded audio/video data stream in order to generate video images for display on a display device and to generate audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder that has a novel memory controller and a novel method for displaying complete decoded/decompressed video frames on a display device without tearing. By use of selective storage of decoded/decompressed video frames in memory, tearing is prevented but information for predicting motion of a video segment is preserved.Type: GrantFiled: September 19, 1997Date of Patent: July 13, 1999Assignee: Cirrus Logic, Inc.Inventors: Yuanyuan Sun, Chih-Ta Sung, Jih-Hsien Soong, Richard Chang, Tzoyao Chan, Chia-Lun Hang
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Patent number: 5838380Abstract: A multimedia system includes an audio/video decompresser/decoder for decompressing/decoding a compressed/encoded audio/video data stream in order to generate video images for display on a display device and to generate audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder that has a novel memory controller and a novel method for displaying complete decoded/decompressed video frames on a display device without tearing. By use of selective storage of decoded/decompressed video frames in memory, tearing is prevented but information for predicting motion of a video segment is preserved.Type: GrantFiled: December 23, 1994Date of Patent: November 17, 1998Assignee: Cirrus Logic, Inc.Inventors: Yuanyuan Sun, Chih-Ta Sung, Jih-Hsien Soong, Richard Chang, Tzoyao Chan, Chia-Lun Hang
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Patent number: 5832120Abstract: A decoder is disclosed for decoding MPEG video bitstreams encoded in any color space encoding format and outputting the decoded video bitstream to different sized windows. Both MPEG decompression and color space decoding and conversion are performed on the bitstreams within the same decoder. The disclosed decoder may be programmed to output the decoded video bitstream in any of three primary color space formats comprising YUV 4:2:0, YUV 4:2:2, and YUV 4:4:4. The decoder may also output the decoded bitstream to different sized windows using Discrete Cosine Transform (DCT) based image resizing.Type: GrantFiled: March 26, 1996Date of Patent: November 3, 1998Assignee: Cirrus Logic, Inc.Inventors: Ramaswamy Prabhakar, Tzoyao Chan, Jih-Hsien Soong
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Patent number: 5831640Abstract: A circuit and method for increasing the processing efficiency of texture map data requests within a 3D subunit of a computer controlled graphics display system. The 3D graphics display subsystem includes a polygon engine, a texture map engine and a pixel pipeline. The texture map engine contains a texture map data access (TDA) circuit having a cache controller with a computer readable cache memory for containing recently used texture maps stored in (u,v) coordinate space. The cache controller is limited in handling only n cache miss operations simultaneously. In one embodiment, n is 1. The TDA circuit also contains a texture map address (TMA) FIFO memory unit for storing texture map addresses associated with texture data requests that hit or missed in the cache memory unit. Since the cache controller handles up to n misses, the texture engine stalls when the (n+1).sup.th unprocessed texture request miss is encountered. Therefore, the TMA FIFO at any time contains at most n miss addresses therein.Type: GrantFiled: December 20, 1996Date of Patent: November 3, 1998Assignee: Cirrus Logic, Inc.Inventors: Vincent W. Wang, Jih-Hsien Soong, Hongjun Shu, Tzoyao Chan
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Patent number: 5815634Abstract: A multimedia system including an audio/video decoder/decompresser for decoding/decompressing a compressed encoded audio/video data stream to generate video images for display and audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder with an audio/video synchronization circuit for substantially synchronizing the display of video images with audio playback. In addition, a step control is provided to allow for viewing of video images on a frame-by frame basis or to freeze or play video in slow motion. When step control is activated, audio output is muted. Audio data corresponding to displayed video is transmitted to the muted audio decoder. An internal system clock may be suppressed to the system clock counter. An external CPU may provide system clock start times corresponding to video frames to be displayed. The external CPU may increment the system clock counter by a an amount corresponding to the difference between a successive frame or number of frames.Type: GrantFiled: December 14, 1994Date of Patent: September 29, 1998Assignee: Cirrus Logic, Inc.Inventors: Daniel T. Daum, Mark A. Rosenau, Jeffrey G. Ort, Richard Chang, Chih-Ta Sung, Tzoyao Chan
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Patent number: 5608877Abstract: An automatic bus identification circuit is provided in a device to reliably detect system bus type on power up despite fluctuations in supply voltage. A system bus type signal is received over a multi-function input line at a first input and a reset signal received over a set line at a second input. A bus type identification circuitry is provided to latch the system bus type signal upon power up and continuously output this signal as a system bus type identification signal. To prevent the influence of disturbances in the power supply upon power-up, a flip-flip is provided to output a logic signal in response to a system reset signal. The flip-flop is configured with a strong-N type inverter to insure that the flip-flop will be set into a grounded state as power is applied to the circuit, despite the influence of transient power supply voltages.Type: GrantFiled: March 24, 1995Date of Patent: March 4, 1997Assignee: Cirrus Logic, Inc.Inventors: Chih-Ta Sung, Tzoyao Chan, Jih-Hsien Soong
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Patent number: 5594660Abstract: A multimedia system including an audio/video decoder/decompresser for decoding/decompressing a compressed encoded audio/video data stream to generate video images for display and audio signals for audible reproduction. The multimedia system includes an integrated system and video decoder with an audio/video synchronization circuit for substancially synchronizing the display of video images with audio playback. A method is described for detecting when the playback of audio and the display of video images are out of synchronization. The circuitry includes three programmable registers, a finite state machine and one full adder using an audio presentation time stamp and the video presentation time stamp. The method uses a rounded programmable bias value which is compared with the difference between the video presentation time stamp and the audio presentation time stamps.Type: GrantFiled: September 30, 1994Date of Patent: January 14, 1997Assignee: Cirrus Logic, Inc.Inventors: Chih-Ta Sung, Tzoyao Chan, Richard Chang, Mark A. Rosenau, Jeffrey G. Ort, Daniel T. Daum, Yuanyuan Sun
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Patent number: 5345577Abstract: A cache controller with both burst and hidden refresh modes. In the burst mode, refresh requests are counted, but not acted on, until a predetermined number of refresh requests have been received. At that time, multiple refreshes are done in a single sequence. Although the amount of time taken for actually refreshing the memory is the same, the time needed for arbitration to obtain control of the necessary busses is reduced, giving an overall savings of time. In the hidden refresh mode, a refresh is done, but no hold signal is sent back to stop the CPU while the refresh is being done. Circuitry is provided which allows local memory accesses, but holds other memory accesses until the refresh is completed. Thus, local memory accesses, which expect data quickly, are not inhibited and other memory accesses, which the CPU expects may take some time, can be held up without the CPU knowing.Type: GrantFiled: November 24, 1992Date of Patent: September 6, 1994Assignee: Chips & Technologies, Inc.Inventors: Tzoyao Chan, Milton Cheung