Patents by Inventor Tzu-An Lin

Tzu-An Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240139262
    Abstract: The present disclosure relates to a complex probiotic composition and a method for improving exercise performance of a subject with low intrinsic aerobic exercise capacity. The complex probiotic composition, which includes Lactobacillus rhamnosus GKLC1, Bifidobacterium lactis GKK24 and Clostridium butyricum GKB7, administered to the subject with the low intrinsic aerobic exercise capacity in a continuation period, can effectively reduce serum lactic acid and serum urea nitrogen after aerobic exercise, reduce proportion of offal fat and/or increase liver and muscle glycogen contents, thereby being as an effective ingredient for preparation of various compositions.
    Type: Application
    Filed: October 13, 2023
    Publication date: May 2, 2024
    Inventors: Chin-Chu CHEN, Yen-Lien CHEN, Shih-Wei LIN, Yen-Po CHEN, Ci-Sian WANG, Yu-Hsin HOU, Yang-Tzu SHIH, Ching-Wen LIN, Ya-Jyun CHEN, Jia-Lin JIANG, You-Shan TSAI, Zi-He WU
  • Publication number: 20240145498
    Abstract: Some embodiments relate to an integrated chip including a substrate having a first side and a second side opposite the first side. The integrated chip further includes a first photodetector positioned in a first pixel region within the substrate. A floating diffusion region with a first doping concentration of a first polarity is positioned on the first side of the substrate in the first pixel region. A first body contact region with a second doping concentration of a second polarity different from the first polarity is positioned on the second side of the substrate in the first pixel region.
    Type: Application
    Filed: January 4, 2023
    Publication date: May 2, 2024
    Inventors: Hao-Lin Yang, Fu-Sheng Kuo, Ching-Chun Wang, Hsiao-Hui Tseng, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung
  • Publication number: 20240136291
    Abstract: Semiconductor devices and methods of forming the same are provided. In some embodiments, a method includes receiving a workpiece having a redistribution layer disposed over and electrically coupled to an interconnect structure. In some embodiments, the method further includes patterning the redistribution layer to form a recess between and separating a first conductive feature and a second conductive feature of the redistribution layer, where corners of the first conductive feature and the second conductive feature are defined adjacent to and on either side of the recess. The method further includes depositing a first dielectric layer over the first conductive feature, the second conductive feature, and within the recess. The method further includes depositing a nitride layer over the first dielectric layer. In some examples, the method further includes removing portions of the nitride layer disposed over the corners of the first conductive feature and the second conductive feature.
    Type: Application
    Filed: January 12, 2023
    Publication date: April 25, 2024
    Inventors: Hsiang-Ku SHEN, Chen-Chiu HUANG, Chia-Nan LIN, Man-Yun WU, Wen-Tzu CHEN, Sean YANG, Dian-Hao CHEN, Chi-Hao CHANG, Ching-Wei LIN, Wen-Ling CHANG
  • Publication number: 20240128216
    Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.
    Type: Application
    Filed: January 4, 2023
    Publication date: April 18, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
  • Patent number: 11961912
    Abstract: The present application provides a semiconductor device and the method of making the same. The method includes recessing a fin extending from a substrate, forming a base epitaxial feature on the recessed fin, forming a bar-like epitaxial feature on the base epitaxial feature, and forming a conformal epitaxial feature on the bar-like epitaxial feature. The forming of the bar-like epitaxial feature includes in-situ doping the bar-like epitaxial feature with an n-type dopant at a first doping concentration. The forming of the conformal epitaxial feature includes in-situ doping the conformal epitaxial feature with a second doping concentration greater than the first doping concentration.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-An Lin, Wei-Yuan Lu, Feng-Cheng Yang, Tzu-Ching Lin, Li-Li Su
  • Patent number: 11955960
    Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.
    Type: Grant
    Filed: August 23, 2022
    Date of Patent: April 9, 2024
    Assignee: CHIP-GAN POWER SEMICONDUCTOR CORPORATION
    Inventors: Ke-Horng Chen, Tzu-Hsien Yang, Yong-Hwa Wen, Kuo-Lin Cheng
  • Publication number: 20240114614
    Abstract: Disclosed is a thermal conduction-electrical conduction isolated circuit board with a ceramic substrate and a power transistor embedded, mainly comprising: a dielectric material layer, a heat-dissipating ceramic block, a securing portion, a stepped metal electrode layer, a power transistor, and a dielectric material packaging, wherein a via hole is formed in the dielectric material layer, the heat-dissipating ceramic block is correspondingly embedded in the via hole, the heat-dissipating ceramic block has a thermal conductivity higher than that of the dielectric material layer and a thickness less than that of the dielectric material layer, the stepped metal electrode layer conducts electricity and heat for the power transistor, the dielectric material packaging is configured to partially expose the source connecting pin, drain connecting pin, and gate connecting pin of the encapsulated stepped metal electrode layer.
    Type: Application
    Filed: September 29, 2022
    Publication date: April 4, 2024
    Inventors: HO-CHIEH YU, CHEN-CHENG-LUNG LIAO, CHUN-YU LIN, JASON AN CHENG HUANG, CHIH-CHUAN LIANG, KUN-TZU CHEN, NAI-HIS HU, LIANG-YO CHEN
  • Publication number: 20240113261
    Abstract: A micro light-emitting element including an epitaxial structure, an insulating layer, an electrode structure and a sacrificial layer is provided. The epitaxial structure includes a top surface and a side surface. The insulating layer is disposed on the top surface and the side surface of the epitaxial structure, and the insulating layer includes an opening. The electrode structure is disposed on the top surface of the epitaxial structure and extends through the opening of the insulating layer to be electrically connected to the epitaxial structure. The sacrificial layer is sandwiched between a surface of the insulating layer and the corresponding electrode structure. A micro light-emitting element display device is further provided.
    Type: Application
    Filed: October 27, 2022
    Publication date: April 4, 2024
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: You-Lin Peng, Fei-Hong Chen, Pai-Yang Tsai, Tzu-Yang Lin
  • Publication number: 20240097011
    Abstract: A method includes forming a fin structure over a substrate, wherein the fin structure comprises first semiconductor layers and second semiconductor layers alternately stacked over a substrate; forming a dummy gate structure over the fin structure; removing a portion of the fin structure uncovered by the dummy gate structure; performing a selective etching process to laterally recess the first semiconductor layers, including injecting a hydrogen-containing gas from a first gas source of a processing tool to the first semiconductor layers and the second semiconductor layers; and injecting an F2 gas from a second gas source of the processing tool to the first semiconductor layers and the second semiconductor layers; forming inner spacers on opposite end surfaces of the laterally recessed first semiconductor layers of the fin structure; and replacing the dummy gate structure and the first semiconductor layers with a metal gate structure.
    Type: Application
    Filed: December 1, 2023
    Publication date: March 21, 2024
    Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC NANJING COMPANY LIMITED
    Inventors: Han-Yu LIN, Fang-Wei LEE, Kai-Tak LAM, Raghunath PUTIKAM, Tzer-Min SHEN, Li-Te LIN, Pinyen LIN, Cheng-Tzu YANG, Tzu-Li LEE, Tze-Chung LIN
  • Publication number: 20240096918
    Abstract: A device structure according to the present disclosure may include a first die having a first substrate and a first interconnect structure, a second die having a second substrate and a second interconnect structure, and a third die having a third interconnect structure and a third substrate. The first interconnect structure is bonded to the second substrate via a first plurality of bonding layers. The second interconnect structure is bonded to the third interconnect structure via a second plurality of bonding layers. The third substrate includes a plurality of photodiodes and a first transistor. The second die includes a second transistor having a source connected to a drain of the first transistor, a third transistor having a gate connected to drain of the first transistor and the source of the second transistor, and a fourth transistor having a drain connected to the source of the third transistor.
    Type: Application
    Filed: January 17, 2023
    Publication date: March 21, 2024
    Inventors: Hao-Lin Yang, Tzu-Jui Wang, Wei-Cheng Hsu, Cheng-Jong Wang, Dun-Nian Yuang, Kuan-Chieh Huang
  • Publication number: 20240079434
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.
    Type: Application
    Filed: January 5, 2023
    Publication date: March 7, 2024
    Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
  • Publication number: 20240072790
    Abstract: The invention uses the control circuit formed on the silicon wafer to detect the leakage current of transistor formed on the depletion mode GaN wafer and then adjust the gate voltage of the depletion mode GaN transistor according to the detected leakage current. Essentially, the gate voltage is reduced or viewed as made more negative when the detected leakage current is larger a specific value. Thus, the gate voltage can be gradually adjusted to approach a specific threshold voltage that right block the leakage current. In other words, by making the gate voltage more negative when non-zero leakage current is detected and even by making the gate voltage more positive when zero leakage current is detected, the depletion mode GaN transistor can be adjusted to have an acceptable or even zero leakage current, a high reaction rate and an optimized efficiency.
    Type: Application
    Filed: August 23, 2022
    Publication date: February 29, 2024
    Inventors: KE-HORNG CHEN, TZU-HSIEN YANG, YONG-HWA WEN, KUO-LIN CHENG
  • Patent number: 11872616
    Abstract: A method for manufacturing a cold-forged, extruded aluminum alloy tube includes the steps of: providing a primary material having a hollow columnar shape and made of an aluminum alloy material, and a first cold extrusion apparatus; processing the primary material to form a preform; subjecting the preform to a homogeneous annealing by heating to a temperature of about 410° C. to 510° C. and then cooling to a temperature of about 160° C. to 200° C.; testing the hardness of the preform; immersing the preform in a tank containing lubricant having a total acidity concentration of 40 to 50 mg/L at a working temperature of 80° C. to 100° C.; and subjecting the preform to cold extrusion.
    Type: Grant
    Filed: August 21, 2019
    Date of Patent: January 16, 2024
    Assignee: Jin Yuncheng Enterprise Co., Ltd.
    Inventors: Kun-Tzu Lin, Yi-Siang Lin
  • Publication number: 20230260810
    Abstract: A device for recognizing wafer identification number with automatically turning on and off recognizing function comprises a base, a support frame, a light source, a plurality of image capturing units, an image recognition unit and a control unit. The base comprises a wafer boat placing portion and a first switch disposed on the wafer boat placing portion. The light source and the image capturing units are disposed on the support frame. The control unit is electrically connected to the first switch, the light source, the image capturing units and the image recognition unit. As such, the device for recognizing wafer identification number with automatically turning on and off recognizing function can automatically turn on and off the light source, the image capturing units, and the image recognition unit, therefore the operation is very easy and convenience.
    Type: Application
    Filed: May 4, 2022
    Publication date: August 17, 2023
    Applicant: National Tsing Hua University
    Inventors: Wei-Chang YEH, Shi-Yi TAN, Yuan Tzu LIN
  • Patent number: 11719346
    Abstract: A water control valve with offset valve core has a main body with a flowing slot, the circumferential wall of which is formed with a water inlet and outlet. An offset rotary valve core is configured offset inside the flowing slot and has a rotary shaft and a water stopping seat. The face of the water stopping seat faces the circumferential wall and has a sealing ring. When the water stopping seat rotates along with the offset rotary valve core and is aligned with the inlet, the sealing ring is pressed against the circumferential wall to close the inlet, thus forming the water stop mode. The rotary shaft and the circumferential wall of the flowing slot define a flowing space. The flow from the inlet must pass through the flowing space and exit through the outlet. A dialing component is used to connect and drive offset rotary valve core.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: August 8, 2023
    Inventor: Tzu-Lin Huang
  • Patent number: 11638943
    Abstract: A method for manufacturing a cold-forged, extruded aluminum alloy tube includes: providing a primary material made of an aluminum alloy material, and a first cold extrusion apparatus; processing the primary material to form a preform; subjecting the preform to a homogeneous annealing by heating to a temperature of about 410° C. to 510° C. and then cooling to a temperature of about 160° C. to 200° C.; testing the hardness of the preform; immersing the preform in a lubricant which is a lipid having a viscosity index equal to or greater than 170, a flash point equal to or greater than 240° C., a pour point equal to or greater than ?24° C., and a fire point equal to or greater than 255° C.; and subjecting the preform to cold extrusion.
    Type: Grant
    Filed: January 3, 2020
    Date of Patent: May 2, 2023
    Assignee: Jin Yuncheng Enterprise Co., Ltd.
    Inventors: Kun-Tzu Lin, Yi-Siang Lin
  • Publication number: 20230112392
    Abstract: A grinding machine includes a working grinder and a holding unit. The working grinder includes a grinding wheel mounting section and a power mechanism. A grinding wheel is mounted on the grinding wheel mounting section. The holding unit includes a base, a movable seat, a holding device, and a grinding wheel trimming module. The grinding wheel trimming module includes a transmission shaft box, a motor, a holding claw, and a clamping cylinder. The holding claw is used for holding a trimming grinding wheel. The holding unit further includes a pedestal, and a clamping arm. The clamping arm is provided with a holding end. Thus, the holding end grips and moves the trimming grinding wheel to the holding claw which is driven by the clamping cylinder to clamp the trimming grinding wheel. Then, the holding end releases the trimming grinding wheel.
    Type: Application
    Filed: October 7, 2021
    Publication date: April 13, 2023
    Inventors: Po-Ming Chang, Shou-Cheng Hsu, Tzu-Lin Chen
  • Publication number: 20230051152
    Abstract: A water control valve with offset valve core has a main body with a flowing slot, the circumferential wall of which is formed with a water inlet and outlet. An offset rotary valve core is configured offset inside the flowing slot and has a rotary shaft and a water stopping seat. The face of the water stopping seat faces the circumferential wall and has a sealing ring. When the water stopping seat rotates along with the offset rotary valve core and is aligned with the inlet, the sealing ring is pressed against the circumferential wall to close the inlet, thus forming the water stop mode. The rotary shaft and the circumferential wall of the flowing slot define a flowing space. The flow from the inlet must pass through the flowing space and exit through the outlet. A dialing component is used to connect and drive offset rotary valve core.
    Type: Application
    Filed: August 3, 2022
    Publication date: February 16, 2023
    Inventor: Tzu-Lin HUANG
  • Publication number: 20220371557
    Abstract: A swing type wheel locking device includes a wheel axle and a pivoting part. A wheel body has an outer wheel face and an axle hole fitted on the periphery of the wheel axle at a position close to the axle end part. A plurality of positioning concave parts are arrayed in a circle on the outer wheel surface. A swing type wheel locking component is pivoted on the wheel axle and has a pivoting end and a swing section. The pivoting end is pivoted on the pivoting part, so that the swing section can be forced to swing, and by choosing different swing angles, it can be shifted between a locked position and released position. When a clamping convex part of the swing section is at a locked position, it is locked right inside the corresponding positioning concave part. Thus, the wheel body is locked against rotation.
    Type: Application
    Filed: March 10, 2022
    Publication date: November 24, 2022
    Inventor: Tzu-Lin HUANG
  • Publication number: 20220336530
    Abstract: A device includes a first plurality of conductive strips have lengthwise directions in a first direction, a selector array overlapping the first plurality of conductive strips, an electrode array overlapping the selector array, a plurality of memory strips over the electrode array, and a second plurality of conductive strips overlapping the plurality of memory strips. The plurality of memory strips and the second plurality of conductive strips have lengthwise directions in a second direction perpendicular to the first direction.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Inventors: Yi-Tzu Lin, Kuo-Chyuan Tzeng, Kao-Chao Lin, Chang-Chih Huang