Patents by Inventor Tzu-Chieh HUANG
Tzu-Chieh HUANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20240193010Abstract: A system, an apparatus, and a method for cloud resource allocation are provided. The cloud resource allocation system includes a plurality of worker nodes and a master node. The master node includes: an orchestrator configured to: obtain multiple node resource information respectively reported by a plurality the worker nodes through a resource manager; and parse a job profile of a job request obtained from the waiting queue through the job scheduler and decide to execute a direct resource allocation or a preemptive indirect resource allocation for a job to be handled requested by the job request based on the node resource information and the job profile.Type: ApplicationFiled: March 14, 2023Publication date: June 13, 2024Applicant: Industrial Technology Research InstituteInventors: Chun-Chieh Huang, Tzu-Chia Wang, Chien-Hung Lee, Yi-Lin Wu, Guo-Hong Lai, Lin-Kang Wu
-
Publication number: 20240188251Abstract: A monitoring and alerting method for a liquid-cooling system includes monitoring a thermal resistance variation of a cold plate of the liquid-cooling system and sending an alert related to the thermal resistance variation. Furthermore, a liquid-cooling system and an electronic device including the same are provided. The liquid-cooling system includes a liquid-cooling module including a cold plate; and a monitoring and alerting module including a control unit, an inlet thermometer in communication with the control unit for measuring a temperature of a liquid inlet of the cold plate, and a heat source thermometer in communication with the control unit for measuring a temperature of a heat source in thermal contact with the cold plate. The control unit produces an alert according to a thermal resistance variation calculated by the inlet thermometer, the heat source thermometer, and a power of the heat source.Type: ApplicationFiled: May 2, 2023Publication date: June 6, 2024Inventors: CHIH CHENG LEE, Tzu-Wei Gu, Chun-Chieh Huang, Yu-Lin Chen
-
Publication number: 20240176093Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: ApplicationFiled: February 5, 2024Publication date: May 30, 2024Inventors: Chao-Chang HU, Chih-Wei WENG, Chia-Che WU, Chien-Yu KAO, Hsiao-Hsin HU, He-Ling CHANG, Chao-Hsi WANG, Chen-Hsien FAN, Che-Wei CHANG, Mao-Gen JIAN, Sung-Mao TSAI, Wei-Jhe SHEN, Yung-Ping YANG, Sin-Hong LIN, Tzu-Yu CHANG, Sin-Jhong SONG, Shang-Yu HSU, Meng-Ting LIN, Shih-Wei HUNG, Yu-Huai LIAO, Mao-Kuo HSU, Hsueh-Ju LU, Ching-Chieh HUANG, Chih-Wen CHIANG, Yu-Chiao LO, Ying-Jen WANG, Shu-Shan CHEN, Che-Hsiang CHIU
-
Publication number: 20240161818Abstract: The invention provides a layout pattern of static random access memory (SRAM), which at least comprises a plurality of gate structures located on a substrate and spanning the plurality of fin structures to form a plurality of transistors distributed on the substrate, wherein the plurality of transistors comprise two pull-up transistors (PU), two pull-down transistors (PD) to form a latch circuit, and two access transistors (PG) connected to the latch circuit. In each SRAM memory cell, the fin structure included in the pull-up transistor (PU) is defined as a PU fin structure, the fin structure included in the pull-down transistor (PD) is defined as a PD fin structure, and the fin structure included in the access transistor (PG) is defined as a PG fin structure, wherein a width of the PD fin structure is wider than a width of the PG fin structure.Type: ApplicationFiled: November 30, 2022Publication date: May 16, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Chun-Hsien Huang, Yu-Tse Kuo, Shu-Ru Wang, Li-Ping Huang, Yu-Fang Chen, Chun-Yen Tseng, Tzu-Feng Chang, Chun-Chieh Chang
-
Publication number: 20240145298Abstract: Structures with doping free connections and methods of fabrication are provided. An exemplary structure includes a substrate; a first region of a first conductivity type formed in the substrate; an overlying layer located over the substrate; a well region of a second conductivity type formed in the overlying layer; a conductive plug laterally adjacent to the well region and extending through the overlying layer to electrically contact with the first region; and a passivation layer located between the conductive plug and the well region.Type: ApplicationFiled: February 17, 2023Publication date: May 2, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shih-Min Huang, Tzu-Jui Wang, Jung-I Lin, Hung-Chang Chien, Kuan-Chieh Huang, Tzu-Hsuan Hsu, Chen-Jong Wang
-
Publication number: 20240128216Abstract: A bonding structure that may be used to form 3D-IC devices is formed using first oblong bonding pads on a first substrate and second oblong bonding pads one a second substrate. The first and second oblong bonding pads are laid crosswise, and the bond is formed. Viewed in a first cross-section, the first bonding pad is wider than the second bonding pad. Viewed in a second cross-section at a right angle to the first, the second bonding pad is wider than the first bonding pad. Making the bonding pads oblong and angling them relative to one another reduces variations in bonding area due to shifts in alignment between the first substrate and the second substrate. The oblong shape in a suitable orientation may also be used to reduce capacitive coupling between one of the bonding pads and nearby wires.Type: ApplicationFiled: January 4, 2023Publication date: April 18, 2024Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Ching-Chun Wang, Hsiao-Hui Tseng, Chen-Jong Wang, Dun-Nian Yaung
-
Publication number: 20240104820Abstract: A tracking system is provided. A head-mounted display device is adapted to be worn on a head of a user and includes: a display displays a virtual world, a first camera obtains a first image, a first processor generates a first tracking result of the user based on the first image, and a first network module. A self-tracking tracker includes: a tracking sensor detects sensor data, a second camera obtains a second image, a second processor generates a self-tracking result based on the sensor data generates a second tracking result based on the second image and the self-tracking result, and a second network module provides the second tracking result to the first network module. The first processor is further configured to update an avatar of the user in the virtual world based on the first tracking result and the second tracking result.Type: ApplicationFiled: August 9, 2023Publication date: March 28, 2024Applicant: HTC CorporationInventors: Tzu-Chieh Yu, Chun-Kai Huang
-
Patent number: 11938405Abstract: An electronic device and a method for detecting abnormal device operation are provided. The method includes: obtaining multiple action events of a movable input device, and each action event including a relative coordinate and a time stamp of the movable input device; generating multiple absolute coordinates based on the relative coordinate of each action event; estimating multiple speed vectors based on the absolute coordinates and the time stamp of each action event; estimating multiple acceleration vectors based on the speed vectors and the time stamp of each action event; and estimating a probability of abnormal operation based on the speed vectors and the acceleration vectors.Type: GrantFiled: November 8, 2022Date of Patent: March 26, 2024Assignee: Acer IncorporatedInventors: Tien-Yi Chi, Wei-Chieh Chen, Shih-Cheng Huang, Tzu-Lung Chuang
-
Publication number: 20240096918Abstract: A device structure according to the present disclosure may include a first die having a first substrate and a first interconnect structure, a second die having a second substrate and a second interconnect structure, and a third die having a third interconnect structure and a third substrate. The first interconnect structure is bonded to the second substrate via a first plurality of bonding layers. The second interconnect structure is bonded to the third interconnect structure via a second plurality of bonding layers. The third substrate includes a plurality of photodiodes and a first transistor. The second die includes a second transistor having a source connected to a drain of the first transistor, a third transistor having a gate connected to drain of the first transistor and the source of the second transistor, and a fourth transistor having a drain connected to the source of the third transistor.Type: ApplicationFiled: January 17, 2023Publication date: March 21, 2024Inventors: Hao-Lin Yang, Tzu-Jui Wang, Wei-Cheng Hsu, Cheng-Jong Wang, Dun-Nian Yuang, Kuan-Chieh Huang
-
Patent number: 11934027Abstract: An optical system affixed to an electronic apparatus is provided, including a first optical module, a second optical module, and a third optical module. The first optical module is configured to adjust the moving direction of a first light from a first moving direction to a second moving direction, wherein the first moving direction is not parallel to the second moving direction. The second optical module is configured to receive the first light moving in the second moving direction. The first light reaches the third optical module via the first optical module and the second optical module in sequence. The third optical module includes a first photoelectric converter configured to transform the first light into a first image signal.Type: GrantFiled: June 21, 2022Date of Patent: March 19, 2024Assignee: TDK TAIWAN CORP.Inventors: Chao-Chang Hu, Chih-Wei Weng, Chia-Che Wu, Chien-Yu Kao, Hsiao-Hsin Hu, He-Ling Chang, Chao-Hsi Wang, Chen-Hsien Fan, Che-Wei Chang, Mao-Gen Jian, Sung-Mao Tsai, Wei-Jhe Shen, Yung-Ping Yang, Sin-Hong Lin, Tzu-Yu Chang, Sin-Jhong Song, Shang-Yu Hsu, Meng-Ting Lin, Shih-Wei Hung, Yu-Huai Liao, Mao-Kuo Hsu, Hsueh-Ju Lu, Ching-Chieh Huang, Chih-Wen Chiang, Yu-Chiao Lo, Ying-Jen Wang, Shu-Shan Chen, Che-Hsiang Chiu
-
Patent number: 11935871Abstract: A semiconductor package including a first semiconductor die, a second semiconductor die, a first insulating encapsulation, a dielectric layer structure, a conductor structure and a second insulating encapsulation is provided. The first semiconductor die includes a first semiconductor substrate and a through silicon via (TSV) extending from a first side to a second side of the semiconductor substrate. The second semiconductor die is disposed on the first side of the semiconductor substrate. The first insulating encapsulation on the second semiconductor die encapsulates the first semiconductor die. A terminal of the TSV is coplanar with a surface of the first insulating encapsulation. The dielectric layer structure covers the first semiconductor die and the first insulating encapsulation. The conductor structure extends through the dielectric layer structure and contacts with the through silicon via.Type: GrantFiled: August 30, 2021Date of Patent: March 19, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Hao-Yi Tsai, Cheng-Chieh Hsieh, Tsung-Hsien Chiang, Hui-Chun Chiang, Tzu-Sung Huang, Ming-Hung Tseng, Kris Lipu Chuang, Chung-Ming Weng, Tsung-Yuan Yu, Tzuan-Horng Liu
-
Publication number: 20240079434Abstract: Various embodiments of the present disclosure are directed towards an image sensor including first chip and a second chip. The first chip includes a first substrate, a plurality of photodetectors disposed in the first substrate, a first interconnect structure disposed on a front side of the first substrate, and a first bond structure disposed on the first interconnect structure. The second chip underlies the first chip. The second chip includes a second substrate, a plurality of semiconductor devices disposed on the second substrate, a second interconnect structure disposed on a front side of the second substrate, and a second bond structure disposed on the second interconnect structure. A first bonding interface is disposed between the second bond structure and the first bond structure. The second interconnect structure is electrically coupled to the first interconnect structure by way of the first and second bond structures.Type: ApplicationFiled: January 5, 2023Publication date: March 7, 2024Inventors: Hao-Lin Yang, Kuan-Chieh Huang, Wei-Cheng Hsu, Tzu-Jui Wang, Chen-Jong Wang, Dun-Nian Yaung, Yu-Chun Chen
-
Patent number: 10257968Abstract: An assembling component includes a frame and a cover. The frame has an opening, a first plane, and a first assembling structure. The first plane surrounds and is adjacent to the opening. An area of the opening is larger than an area of the first plane. The first assembling structure is formed on the first plane. The cover covers the opening and the first plane and has a second assembling structure. A side of the cover has a second plane parallel to the first plane. The second assembling structure is formed on the second plane. An end of the second assembling structure extends from the second plane toward another side of the cover. The second assembling structure is assembled with the first assembling structure to stop the cover from moving relative to the frame.Type: GrantFiled: June 2, 2017Date of Patent: April 9, 2019Assignee: Wistron CorporationInventors: Tzu-Chieh Huang, Hsu-Lung Lai, Tsung-Ming Lee
-
Publication number: 20180249598Abstract: An assembling component includes a frame and a cover. The frame has an opening, a first plane, and a first assembling structure. The first plane surrounds and is adjacent to the opening. An area of the opening is larger than an area of the first plane. The first assembling structure is formed on the first plane. The cover covers the opening and the first plane and has a second assembling structure. A side of the cover has a second plane parallel to the first plane. The second assembling structure is formed on the second plane. An end of the second assembling structure extends from the second plane toward another side of the cover. The second assembling structure is assembled with the first assembling structure to stop the cover from moving relative to the frame.Type: ApplicationFiled: June 2, 2017Publication date: August 30, 2018Applicant: Wistron CorporationInventors: Tzu-Chieh Huang, Hsu-Lung Lai, Tsung-Ming Lee
-
Patent number: 9898116Abstract: A touch panel including a substrate and a touch element is provided. The substrate has a first predetermined number of touch areas. Each of the touch areas has a second predetermined number of sub touch areas. The touch element includes a plurality of first electrodes, a plurality of second electrodes, a plurality of third electrodes and the first predetermined number of fourth electrodes. Multiple of the first electrodes arranged along a first direction and corresponding to different sub touch areas are electrically connected, multiple of the second electrodes arranged along a second direction and corresponding to different sub touch areas are electrically connected, and multiple of the third electrodes corresponding to different touch areas are electrically connected.Type: GrantFiled: May 4, 2016Date of Patent: February 20, 2018Assignee: Wistron CorporationInventors: Tzu-Chieh Huang, Tung-Yang Tang, Hua-Min Tseng
-
Patent number: 9811231Abstract: A touch panel including a substrate and a touch element is provided. The substrate has a predetermined number of touch areas. The touch element is disposed in the predetermined number of touch areas and includes a plurality of first electrodes, a plurality of second electrodes, and the predetermined number of third electrodes. Each third electrode includes a plurality of third electrode patterns and a plurality of third connection portions. Each third connection portion electrically insulatingly intersects at least one of the first electrodes or at least one of the second electrodes and electrically connects two adjacent third electrode patterns. Several of the first electrodes arranged in a first direction and corresponding to different touch areas are electrically connected, and several of the second electrodes arranged in a second direction and corresponding to different touch areas are electrically connected.Type: GrantFiled: April 13, 2016Date of Patent: November 7, 2017Assignee: Wistron CorporationInventors: Tzu-Chieh Huang, Tung-Yang Tang, Hua-Min Tseng
-
Publication number: 20170255287Abstract: A touch panel including a substrate and a touch element is provided. The substrate has a first predetermined number of touch areas. Each of the touch areas has a second predetermined number of sub touch areas. The touch element includes a plurality of first electrodes, a plurality of second electrodes, a plurality of third electrodes and the first predetermined number of fourth electrodes. Multiple of the first electrodes arranged along a first direction and corresponding to different sub touch areas are electrically connected, multiple of the second electrodes arranged along a second direction and corresponding to different sub touch areas are electrically connected, and multiple of the third electrodes corresponding to different touch areas are electrically connected.Type: ApplicationFiled: May 4, 2016Publication date: September 7, 2017Inventors: Tzu-Chieh Huang, Tung-Yang Tang, Hua-Min Tseng
-
Publication number: 20170255303Abstract: A touch panel including a substrate and a touch element is provided. The substrate has a predetermined number of touch areas. The touch element is disposed in the predetermined number of touch areas and includes a plurality of first electrodes, a plurality of second electrodes, and the predetermined number of third electrodes. Each third electrode includes a plurality of third electrode patterns and a plurality of third connection portions. Each third connection portion electrically insulatingly intersects at least one of the first electrodes or at least one of the second electrodes and electrically connects two adjacent third electrode patterns. Several of the first electrodes arranged in a first direction and corresponding to different touch areas are electrically connected, and several of the second electrodes arranged in a second direction and corresponding to different touch areas are electrically connected.Type: ApplicationFiled: April 13, 2016Publication date: September 7, 2017Inventors: Tzu-Chieh Huang, Tung-Yang Tang, Hua-Min Tseng
-
Patent number: 9374933Abstract: A shielding device and an electronic device having the same are disclosed. The shielding device is disposed on a circuit board for covering an electronic component. The shielding device comprises a first case and a second case. The first case comprises a first limiting structure and a second limiting structure. The second case is mounted on the circuit board and includes a frame and a first slot. The frame forms an opening. When the first case is connected with the second case, the second limiting structure can move along a first direction to a bottom of the frame and is prevented from moving along a second direction. The first slot corresponds to the first limiting structure to allow the first limiting structure to be inserted into the first slot along the first direction and the first limiting structure is prevented from moving along the second direction.Type: GrantFiled: June 6, 2013Date of Patent: June 21, 2016Assignee: WISTRON CORPORATIONInventors: Hou-Chun Huang, Tzu-Chieh Huang
-
Publication number: 20140043785Abstract: A shielding device and an electronic device having the same are disclosed. The shielding device is disposed on a circuit board for covering an electronic component. The shielding device comprises a first case and a second case. The first case comprises a first limiting structure and a second limiting structure. The second case is mounted on the circuit board and includes a frame and a first slot. The frame forms an opening. When the first case is connected with the second case, the second limiting structure can move along a first direction to a bottom of the frame and is prevented from moving along a second direction. The first slot corresponds to the first limiting structure to allow the first limiting structure to be inserted into the first slot along the first direction and the first limiting structure is prevented from moving along the second direction.Type: ApplicationFiled: June 6, 2013Publication date: February 13, 2014Inventors: Hou-Chun HUANG, Tzu-Chieh HUANG