Abstract: A memory device, such as a 3D AND flash memory, includes a memory cell block, a word line driver, and a plurality of bit line switches. The word line driver has a plurality of complementary transistor pairs for respectively generating a plurality of word line signals for a plurality of word lines. Substrates of a first transistor and a second transistor of each of the complementary transistor pairs respectively receive a first voltage and a second voltage. Each of the bit line switches includes a third transistor. A substrate of the third transistor receives a third voltage. The first voltage, the second voltage, and the third voltage are constant static voltages during a soft program operation and a soft program verify operation.

Abstract: A semiconductor device and a method of forming the same are provided. The semiconductor device includes a substrate, a gate structure, a dielectric structure and a contact structure. The substrate has source/drain (S/D) regions. The gate structure is on the substrate and between the S/D regions. The dielectric structure covers the gate structure. The contact structure penetrates through the dielectric structure to connect to the S/D region. A lower portion of a sidewall of the contact structure is spaced apart from the dielectric structure by an air gap therebetween, while an upper portion of the sidewall of the contact structure is in contact with the dielectric structure.

Abstract: An asymmetric half-bridge converter is provided. The asymmetric half-bridge converter includes a switch circuit, a resonance tank, a current sensor, and a controller. The current sensor senses a waveform of a resonance current flowing through the resonance tank to generate a sensing result. The controller determines the sensing result. When the sensing result indicates that an ending current value of a primary resonance waveform of the resonance current is greater than a predetermined value, the controller performs a first switching operation on the switch circuit. When the sensing result indicates that the ending current value of the primary resonance waveform is less than or equal to the predetermined value, the controller performs a second switching operation on the switch circuit.

Abstract: A helmet liner includes an outer protective layer, an inner protective layer and a plurality of breakable connecting members. The outer protective layer has a first base layer and a plurality of first bulges. The plural first bulges are provided on the first base layer and located at the inner side of the first base layer. The inner protective layer has a second base layer and a plurality of second bulges. The plural second bulges provided on the second base layer and located at the outer side of the second base layer. The plural connecting members are connected between the first bulges and the second bulges so as to endow the helmet liner with reliable impact-absorbing capacity and ensure safety of helmet wearers.

Abstract: Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage.

Abstract: Activate one active word line of two active word lines formed between two isolation word lines to a logic-high voltage, and float another active word line of the two active word lines. Then activate a plurality of first memory cells corresponding to the active word line having the logic-high voltage to a logic “1” voltage, and write a logic “0” voltage to a plurality of second memory cells corresponding to the floating active word line. Then write the logic “1” voltage to a plurality of bit lines. Then, suspend for charge sharing for a third predetermined time. Finally, read a voltage of the floating active word line to check if any leakage path exists between the floating active word line and the active word line having the logic-high voltage.

Abstract: Detecting an unauthorized wireless access point in a network uses a detector. A rogue access point detector receives an incoming data packet which is scanned for a time expiration value. The time expiration value may be a Time To Live (TTL) value as used in Internet Protocol data packet headers. It is determined whether the time expiration value is the same as a threshold time expiration value. If the time expiration value is not the same as the threshold value, it is determined whether the incoming data packet was routed through an authorized access point in the network. If it is determined that the packet is not being routed from an authorized access point, a security component in the network, such as a network administrator's workstation, is notified. During this process the time expiration value remains unchanged.

Abstract: A method detects if a word line of a memory array is broken. The method includes writing a first datum to a memory cell when coupling a corresponding word line to a voltage source, writing a second datum different from the first datum to the memory cell when the coupling between the corresponding word line and the voltage source is decoupled, reading the stored data of the memory cell, and determining if the word line is broken according to the read data, the first datum, and the second datum.

Abstract: A method detects if a word line of a memory array is broken. The method includes writing a first datum to a memory cell when coupling a corresponding word line to a voltage source, writing a second datum different from the first datum to the memory cell when the coupling between the corresponding word line and the voltage source is decoupled, reading the stored data of the memory cell, and determining if the word line is broken according to the read data, the first datum, and the second datum.