Patents by Inventor Tzu-Heng Huang

Tzu-Heng Huang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11939268
    Abstract: A method of forming low-k material is provided. The method includes providing a plurality of core-shell particles. The core of the core-shell particles has a first ceramic with a low melting point. The shell of the core-shell particles has a second ceramic with a low melting point and a low dielectric constant. The core-shell particles are sintered and molded to form a low-k material. The shell of the core-shell particles is connected to form a network structure of a microcrystal phase.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Chuang Chiu, Tzu-Yu Liu, Tien-Heng Huang, Tzu-Chi Chou, Cheng-Ting Lin
  • Patent number: 11515613
    Abstract: A bendable antenna is provided. The bendable antenna is adapted to connect a cable. The bendable antenna includes an antenna body, a connection base, a first pivot base, a second pivot base, a first elastic element and a first restriction structure. The connection base is connected to the antenna body. The first pivot base is connected to the connection base, wherein the first pivot base includes a first recess. The second pivot base pivots on the first pivot base. The first elastic element is disposed in the first recess of the first pivot base, wherein the first elastic element is telescoped on the cable. The first restriction structure is connected to the connection base, wherein the first restriction structure pushes the first elastic element to restrict the first elastic element in the first recess.
    Type: Grant
    Filed: February 8, 2021
    Date of Patent: November 29, 2022
    Assignee: WISTRON NEWEB CORP.
    Inventors: Tzu-Heng Huang, Chun-Yu Lee
  • Publication number: 20220236476
    Abstract: An indicator module is provided, including a device housing, a circuit board, a plurality of light sources, a dividing structure, and a homogenizing plate. The device housing includes a transparent window. The circuit board is disposed in the device housing. The light sources are disposed on the circuit board, wherein each light source is adapted to provide a light beam. The dividing structure is disposed in the device housing, wherein the dividing structure defines a plurality of divided spaces, and the divided spaces respectively correspond to the light sources. The homogenizing plate is disposed in the device housing. The homogenizing plate corresponds to the divided spaces, wherein an air gap is formed between the transparent window and the homogenizing plate. The light beam enters the divided space from the light source, passes through the homogenizing plate and the air gap, and is emitted through the transparent window.
    Type: Application
    Filed: October 5, 2021
    Publication date: July 28, 2022
    Inventors: Yan-Da CHEN, Ying-Yen LU, Tzu-Heng HUANG, Jun-Wei WANG
  • Patent number: 11378734
    Abstract: An indicator module is provided, including a device housing, a circuit board, a plurality of light sources, a dividing structure, and a homogenizing plate. The device housing includes a transparent window. The circuit board is disposed in the device housing. The light sources are disposed on the circuit board, wherein each light source is adapted to provide a light beam. The dividing structure is disposed in the device housing, wherein the dividing structure defines a plurality of divided spaces, and the divided spaces respectively correspond to the light sources. The homogenizing plate is disposed in the device housing. The homogenizing plate corresponds to the divided spaces, wherein an air gap is formed between the transparent window and the homogenizing plate. The light beam enters the divided space from the light source, passes through the homogenizing plate and the air gap, and is emitted through the transparent window.
    Type: Grant
    Filed: October 5, 2021
    Date of Patent: July 5, 2022
    Assignee: WISTRON NEWEB CORP.
    Inventors: Yan-Da Chen, Ying-Yen Lu, Tzu-Heng Huang, Jun-Wei Wang
  • Publication number: 20210376442
    Abstract: A bendable antenna is provided. The bendable antenna is adapted to connect a cable. The bendable antenna includes an antenna body, a connection base, a first pivot base, a second pivot base, a first elastic element and a first restriction structure. The connection base is connected to the antenna body. The first pivot base is connected to the connection base, wherein the first pivot base includes a first recess. The second pivot base pivots on the first pivot base. The first elastic element is disposed in the first recess of the first pivot base, wherein the first elastic element is telescoped on the cable. The first restriction structure is connected to the connection base, wherein the first restriction structure pushes the first elastic element to restrict the first elastic element in the first recess.
    Type: Application
    Filed: February 8, 2021
    Publication date: December 2, 2021
    Inventors: Tzu-Heng HUANG, Chun-Yu LEE
  • Patent number: 10317462
    Abstract: An integrated circuit for on-chip speed grading comprises test circuitry comprising scan chains and a test controller; and wide-range clock signal generation circuitry comprising phase-locked loop circuitry and frequency divider circuitry. The wide-range clock signal generation circuitry is configured to generate a wide-range test clock signal for the test circuitry to conduct a structural delay test for on-chip speed grading. The wide-range test clock signal is generated based on a test clock signal associated with the test circuitry, a frequency range selection signal and a frequency setting signal.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: June 11, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Tzu-Heng Huang
  • Publication number: 20170328952
    Abstract: An integrated circuit for on-chip speed grading comprises test circuitry comprising scan chains and a test controller; and wide-range clock signal generation circuitry comprising phase-locked loop circuitry and frequency divider circuitry. The wide-range clock signal generation circuitry is configured to generate a wide-range test clock signal for the test circuitry to conduct a structural delay test for on-chip speed grading. The wide-range test clock signal is generated based on a test clock signal associated with the test circuitry, a frequency range selection signal and a frequency setting signal.
    Type: Application
    Filed: May 11, 2017
    Publication date: November 16, 2017
    Inventors: Shi-Yu Huang, Kun-Han Tsai, Wu-Tung Cheng, Tzu-Heng Huang