Abstract: A multi-channel switch device is provided. The multi-channel switch device includes a first-stage switch circuit, at least one second-stage switch circuit, and multiple third-stage switch circuits. The first-stage switch circuit includes a first common-mode node, a first input/output terminal, and at least one first-stage connection terminal. The second-stage switch circuit includes a second common-mode node, a second-stage transmission terminal, and multiple second-stage connection terminals. Each of the third-stage switch circuits includes a third common-mode node, a third-stage transmission terminal, a reference terminal, and a second input/output terminal. Two of the first input/output terminal and the at least one first-stage connection terminal are connected through the first common-mode node. Two of the second-stage transmission terminal and the second-stage connection terminals are connected through the second common-mode node.

Abstract: A multi-channel switch device is provided. The multi-channel switch device includes a first-stage switch circuit, at least one second-stage switch circuit, and multiple third-stage switch circuits. The first-stage switch circuit includes a first common-mode node, a first input/output terminal, and at least one first-stage connection terminal. The second-stage switch circuit includes a second common-mode node, a second-stage transmission terminal, and multiple second-stage connection terminals. Each of the third-stage switch circuits includes a third common-mode node, a third-stage transmission terminal, a reference terminal, and a second input/output terminal. Two of the first input/output terminal and the at least one first-stage connection terminal are connected through the first common-mode node. Two of the second-stage transmission terminal and the second-stage connection terminals are connected through the second common-mode node.

Abstract: A multi-channel switch device is provided. The multi-channel switch device includes a first-stage switch circuit, at least one second-stage switch circuit, and multiple third-stage switch circuits. The first-stage switch circuit includes a first common-mode node, a first input/output terminal, and at least one first-stage connection terminal. The second-stage switch circuit includes a second common-mode node, a second-stage transmission terminal, and multiple second-stage connection terminals. Each of the third-stage switch circuits includes a third common-mode node, a third-stage transmission terminal, a reference terminal, and a second input/output terminal. Two of the first input/output terminal and the at least one first-stage connection terminal are connected through the first common-mode node. Two of the second-stage transmission terminal and the second-stage connection terminals are connected through the second common-mode node.

Abstract: A power metal-oxide-semiconductor (MOS) device is provided. The power MOS device is formed on a semiconductor substrate and includes an active region and a breakdown generated region. The active region includes a plurality of P-type doping regions and a plurality of N-type doping region alternatively arrayed between a source electrode and a drain electrode, and also includes a plurality of gate structures for controlling the conductive state of the active region. The breakdown generated region includes at least one P-type doping region and at least one N-type doping region alternatively arrayed between a source electrode and a drain electrode, and the breakdown voltage of the breakdown generated region is smaller than that of the active region.

Abstract: A photo relay includes an illuminating unit, a photoelectric conversion IC, a first MOS IC and a second MOS IC. The illuminating unit receives an input signal to generate an illuminating signal. The photoelectric conversion IC receives the illuminating signal to generate a voltage control signal accordingly. The second MOS IC is reversely stacked on the first MOS IC, such that the source electrodes of the two MOS ICs are electrically connected, and the gate electrodes of the two MOS ICs are electrically connected through a gate connection structure for receiving the voltage control signal, and the drain electrodes of the two MOS ICs generate an output signal according to the received voltage control signal.

Abstract: A photo relay includes an illuminating unit, a photoelectric conversion IC, a first MOS IC and a second MOS IC. The illuminating unit receives an input signal to generate an illuminating signal. The photoelectric conversion IC receives the illuminating signal to generate a voltage control signal accordingly. The second MOS IC is reversely stacked on the first MOS IC, such that the source electrodes of the two MOS ICs are electrically connected, and the gate electrodes of the two MOS ICs are electrically connected through a gate connection structure for receiving the voltage control signal, and the drain electrodes of the two MOS ICs generate an output signal according to the received voltage control signal.