Patents by Inventor Tzu-Lang Shih
Tzu-Lang Shih has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250120161Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: ApplicationFiled: December 17, 2024Publication date: April 10, 2025Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Patent number: 12211915Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: GrantFiled: March 1, 2023Date of Patent: January 28, 2025Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Publication number: 20240355894Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: ApplicationFiled: June 28, 2024Publication date: October 24, 2024Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Patent number: 12057483Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: GrantFiled: December 8, 2022Date of Patent: August 6, 2024Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Publication number: 20230207647Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: ApplicationFiled: March 1, 2023Publication date: June 29, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Patent number: 11626500Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: GrantFiled: July 8, 2021Date of Patent: April 11, 2023Assignee: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Publication number: 20230105690Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: ApplicationFiled: December 8, 2022Publication date: April 6, 2023Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih
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Publication number: 20220376071Abstract: A semiconductor device includes a semiconductor substrate, a first gate oxide layer, and a first source/drain doped region. The first gate oxide layer is disposed on the semiconductor substrate, and the first gate oxide layer includes a main portion and an edge portion having a sloping sidewall. The first source/drain doped region is disposed in the semiconductor substrate and located adjacent to the edge portion of the first gate oxide layer. The first source/drain doped region includes a first portion and a second portion. The first portion is disposed under the edge portion of the first gate oxide layer in a vertical direction, and the second portion is connected with the first portion.Type: ApplicationFiled: July 8, 2021Publication date: November 24, 2022Applicant: UNITED MICROELECTRONICS CORP.Inventors: Ming-Hua Tsai, Jung Han, Ming-Chi Li, Chih-Mou Lin, Yu-Hsiang Hung, Yu-Hsiang Lin, Tzu-Lang Shih