Patents by Inventor Tzu Ling Wong

Tzu Ling Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Lead frame for semiconductor package
    Patent number: 8415779
    Abstract: A lead frame for providing electrical interconnection to an Integrated Circuit (IC) die. The lead frame includes a die support area for receiving and supporting the IC die and a plurality of leads surrounding the die support area. A plurality of interconnect receiving portions is formed in the die support area. The interconnect receiving portions are for providing electrical interconnection to first bumps on a bottom surface of the IC die. The leads are for providing electrical interconnection to second bumps on a surface of the IC die, the second bumps surrounding the first bumps.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: April 9, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Tzu Ling Wong, Chee Seng Foong, Kai Yun Yow
  • Semiconductor package with protective tape
    Patent number: 8237293
    Abstract: An improved semiconductor package includes thermal tape placed over a top side of a die that is attached to a substrate with an underfill material. The tape extends to the substrate. The tape deforms with heat and entraps the die and underfill material. Air bubbles are trapped between the tape and the die and underfill material. The tape can be weighted and lined with an adhesive material. The tape aids in preventing the die from cracking due to mishandling.
    Type: Grant
    Filed: September 2, 2010
    Date of Patent: August 7, 2012
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Tzu Ling Wong, Boon Yew Low, Vemal Raja Manikam, Vittal Raja Manikam
  • LEAD FRAME FOR SEMICONDUCTOR PACKAGE
    Publication number: 20110248390
    Abstract: A lead frame for providing electrical interconnection to an Integrated Circuit (IC) die. The lead frame includes a die support area for receiving and supporting the IC die and a plurality of leads surrounding the die support area. A plurality of interconnect receiving portions is formed in the die support area. The interconnect receiving portions are for providing electrical interconnection to first bumps on a bottom surface of the IC die. The leads are for providing electrical interconnection to second bumps on a surface of the IC die, the second bumps surrounding the first bumps.
    Type: Application
    Filed: March 15, 2011
    Publication date: October 13, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Tzu Ling WONG, Chee Seng FOONG, Kai Yun YOW
  • SEMICONDUCTOR PACKAGE AND METHOD OF MAKING SAME
    Publication number: 20110121468
    Abstract: An improved semiconductor package includes thermal tape placed over a top side of a die that is attached to a substrate with an underfill material. The tape extends to the substrate. The tape deforms with heat and entraps the die and underfill material. Air bubbles are trapped between the tape and the die and underfill material. The tape can be weighted and lined with an adhesive material. The tape aids in preventing the die from cracking due to mishandling.
    Type: Application
    Filed: September 2, 2010
    Publication date: May 26, 2011
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Tzu Ling WONG, Boon Yew Low, Vemal Raja Manikam, Vittal Raja Manikam