Patents by Inventor Tzu-Min Chou

Tzu-Min Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Processor and method for recovering global history shift register and return address stack thereof by determining a removal range of a branch recovery table
    Patent number: 8078851
    Abstract: A method for recovering global history shift register (GHSR) and return address stack (RAS) is provided, which is applicable to an instruction pipeline of a processor and includes the following steps. First, provide a branch recovery table (BRT) and a backup stack. Whenever a branch instruction enters a predetermined stage of the instruction pipeline, add a record in the BRT according to the branch instruction. Whenever a return address is popped from the RAS of the instruction pipeline, push the return address into the backup stack. When flushing the instruction pipeline, determine a removal range of the BRT according to the condition which triggers the pipeline flush. Recover the RAS according to the records in the removal range and the backup stack. Remove all records in the removal range. Recover the GHSR of the instruction pipeline according to the removed records.
    Type: Grant
    Filed: December 18, 2008
    Date of Patent: December 13, 2011
    Assignee: Faraday Technology Corp.
    Inventors: Guan-Ying Chiou, Yuan-Jung Kuo, Hui-Chin Yang, Tzu-Min Chou, Shun-Chieh Chang, Chung-Ping Chung
  • PROCESSOR AND METHOD FOR RECOVERING GLOBAL HISTORY SHIFT REGISTER AND RETURN ADDRESS STACK THEREOF
    Publication number: 20100161951
    Abstract: A method for recovering global history shift register (GHSR) and return address stack (RAS) is provided, which is applicable to an instruction pipeline of a processor and includes the following steps. First, provide a branch recovery table (BRT) and a backup stack. Whenever a branch instruction enters a predetermined stage of the instruction pipeline, add a record in the BRT according to the branch instruction. Whenever a return address is popped from the RAS of the instruction pipeline, push the return address into the backup stack. When flushing the instruction pipeline, determine a removal range of the BRT according to the condition which triggers the pipeline flush. Recover the RAS according to the records in the removal range and the backup stack. Remove all records in the removal range. Recover the GHSR of the instruction pipeline according to the removed records.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 24, 2010
    Applicant: FARADAY TECHNOLOGY CORP.
    Inventors: Guan-Ying Chiou, Yuan-Jung Kuo, Hui-Chin Yang, Tzu-Min Chou, Shun-Chieh Chang, Chung-Ping Chung