Abstract: Some embodiments relate to an integrated chip including a substrate having a first side and a second side opposite the first side. The integrated chip further includes a first photodetector positioned in a first pixel region within the substrate. A floating diffusion region with a first doping concentration of a first polarity is positioned on the first side of the substrate in the first pixel region. A first body contact region with a second doping concentration of a second polarity different from the first polarity is positioned on the second side of the substrate in the first pixel region.

Abstract: A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.

Abstract: A method for manufacturing a circuit board for a semiconductor package is proposed. The method includes providing a circuit board having a circuit layer formed on at least one surface thereof, wherein the circuit board is defined with at least one predetermined area, the circuit layer includes a plurality of electrically conductive pads and conductive wires for electroplating and being connected with the electrically conductive pads, the conductive wires are formed within the predetermined area, and a metal protecting layer formed to cover the electrically conductive pads and the conductive wires; removing the portion of the metal protecting layer and the conductive wires covered by the portion of the metal protecting layer to electrically disconnect the electrically conductive pads from the conductive wires; and removing the predetermined area to form a through hole in the circuit board. Thus, formation of burrs in the metal protecting layer can be prevented after formation of the through hole.

Abstract: A method for manufacturing a semiconductor package is proposed. A circuit board with a circuit layer on at least one surface thereof is provided. The circuit board has at least one free area, and the circuit layer has a plurality of electrically connecting pads distributed on the periphery of the free area. A metal protecting layer is plated on the electrically connecting pads by non-plating line. The free area is removed, to form a cavity penetrating the circuit board. The present invention prevents burrs which may otherwise form on the periphery of a cavity, to increase the yield and throughput.