Patents by Inventor Tzu-Ting Chou

Tzu-Ting Chou has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147711
    Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: PERNG-FEI YUH, YIH WANG, MENG-SHENG CHANG, JUI-CHE TSAI, KU-FENG LIN, YU-WEI LIN, KEH-JENG CHANG, CHANSYUN DAVID YANG, SHAO-TING WU, SHAO-YU CHOU, PHILEX MING-YAN FAN, YOSHITAKA YAMAUCHI, TZU-HSIEN YANG
  • Patent number: 11939268
    Abstract: A method of forming low-k material is provided. The method includes providing a plurality of core-shell particles. The core of the core-shell particles has a first ceramic with a low melting point. The shell of the core-shell particles has a second ceramic with a low melting point and a low dielectric constant. The core-shell particles are sintered and molded to form a low-k material. The shell of the core-shell particles is connected to form a network structure of a microcrystal phase.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Kuo-Chuang Chiu, Tzu-Yu Liu, Tien-Heng Huang, Tzu-Chi Chou, Cheng-Ting Lin
  • Publication number: 20230187383
    Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a package frame. The semiconductor package is disposed on the circuit substrate. The package frame is disposed over the circuit substrate. The package frame encircles the semiconductor package. The semiconductor package has a first surface facing the circuit substrate and a second surface opposite to the first surface. The package frame leaves exposed at least a portion of the second surface of the semiconductor package. The package frame forms a cavity, which cavity encircles the semiconductor package.
    Type: Application
    Filed: February 3, 2023
    Publication date: June 15, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Lin, Chun-Yen Lan, Tzu-Ting Chou, Tzu-Shiun Sheu, Chih-Wei Lin, Shih-Peng Tai, Wei-Cheng Wu, Ching-Hua Hsieh
  • Publication number: 20230067664
    Abstract: A package structure includes a circuit substrate, a package element and a molding layer. The package element is disposed on the circuit substrate and is electrically connected with the circuit substrate. The molding layer is disposed over the circuit substrate and covers at least a top surface of the circuit substrate. The molding layer includes a first portion wrapping around sidewalls of the package element and having a first thickness, and a second portion surrounding the first portion and connected with the first portion. The first thickness of the first portion is larger than a second thickness of the second portion. A top surface of the first portion of the molding layer is higher than a top surface of the package element.
    Type: Application
    Filed: July 15, 2022
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chao-Wei Li, Tzu-Ting Chou, Chun-Yen Lan, Yu-Wei Lin, Sheng-Hsiang Chiu, Chih-Wei Lin, Ching-Hua Hsieh
  • Publication number: 20230062468
    Abstract: A package structure including a substrate, a first semiconductor element disposed on and electrically connected with the substrate, a second semiconductor element disposed on and electrically connected with the substrate and a molding layer disposed over the substrate and covering at least a top surface of the substrate. The second semiconductor element and the first semiconductor element perform different functions. The molding layer encapsulates the second semiconductor element and wraps around sidewalls of the first semiconductor element. A top surface of the molding layer is higher than a top surface of the first semiconductor element. The molding layer has an opening extending from the top surface of the molding layer to the top surface of the first semiconductor element, so that the top surface of the first semiconductor element is exposed.
    Type: Application
    Filed: August 31, 2021
    Publication date: March 2, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sheng-Hsiang Chiu, Chia-Min Lin, Tzu-Ting Chou, Sheng-Feng Weng, Chao-wei Li, Chih-Wei Lin, Ching-Hua Hsieh
  • Patent number: 11587887
    Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a package frame. The semiconductor package is disposed on the circuit substrate. The package frame is disposed over the circuit substrate. The package frame encircles the semiconductor package. The semiconductor package has a first surface facing the circuit substrate and a second surface opposite to the first surface. The package frame leaves exposed at least a portion of the second surface of the semiconductor package. The package frame forms a cavity, which cavity encircles the semiconductor package.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: February 21, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Lin, Chun-Yen Lan, Tzu-Ting Chou, Tzu-Shiun Sheu, Chih-Wei Lin, Shih-Peng Tai, Wei-Cheng Wu, Ching-Hua Hsieh
  • Publication number: 20220223542
    Abstract: A semiconductor device includes a circuit substrate, a semiconductor package, and a package frame. The semiconductor package is disposed on the circuit substrate. The package frame is disposed over the circuit substrate. The package frame encircles the semiconductor package. The semiconductor package has a first surface facing the circuit substrate and a second surface opposite to the first surface. The package frame leaves exposed at least a portion of the second surface of the semiconductor package. The package frame forms a cavity, which cavity encircles the semiconductor package.
    Type: Application
    Filed: January 14, 2021
    Publication date: July 14, 2022
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Wei Lin, Chun-Yen Lan, Tzu-Ting Chou, Tzu-Shiun Sheu, Chih-Wei Lin, Shih-Peng Tai, Wei-Cheng Wu, Ching-Hua Hsieh
  • Patent number: 11079669
    Abstract: An extreme ultraviolet (EUV) mask is received. The EUV mask has an EUV pellicle disposed thereover. The EUV pellicle is coupled to the EUV mask at least in part via glue that is disposed on the EUV mask. The EUV pellicle is removed, thereby exposing the glue. A localized glue-removal process is performed by targeting a region of the EUV mask on which the glue is disposed. The localized glue-removal process is performed without affecting other regions of the EUV mask that do not have the glue disposed thereon. The localized glue-removal process may include injecting a cleaning chemical onto the glue and removing a waste chemical produced by the cleaning chemical and the glue. The localized glue-removal process may also include a plasma process that applies plasma to the glue. The localized glue-removal process may further include a laser process that shoots a focused laser beam at the glue.
    Type: Grant
    Filed: December 27, 2019
    Date of Patent: August 3, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzu-Ting Chou, Chung-Hsuan Liu, Kuan-Wen Lin, Chi-Lun Lu, Ting-Hao Hsu, Sheng-Chi Chin
  • Publication number: 20200150523
    Abstract: An extreme ultraviolet (EUV) mask is received. The EUV mask has an EUV pellicle disposed thereover. The EUV pellicle is coupled to the EUV mask at least in part via glue that is disposed on the EUV mask. The EUV pellicle is removed, thereby exposing the glue. A localized glue-removal process is performed by targeting a region of the EUV mask on which the glue is disposed. The localized glue-removal process is performed without affecting other regions of the EUV mask that do not have the glue disposed thereon. The localized glue-removal process may include injecting a cleaning chemical onto the glue and removing a waste chemical produced by the cleaning chemical and the glue. The localized glue-removal process may also include a plasma process that applies plasma to the glue. The localized glue-removal process may further include a laser process that shoots a focused laser beam at the glue.
    Type: Application
    Filed: December 27, 2019
    Publication date: May 14, 2020
    Inventors: Tzu-Ting Chou, Chung-Hsuan Liu, Kuan-Wen Lin, Chi-Lun Lu, Ting-Hao Hsu, Sheng-Chi Chin
  • Patent number: 10520805
    Abstract: An extreme ultraviolet (EUV) mask having a pellicle disposed thereover is received. The EUV pellicle is coupled to the EUV mask at least in part via glue that is disposed on the EUV mask. The EUV pellicle is removed, thereby exposing the glue. A localized glue-removal process is performed by targeting a region of the EUV mask on which the glue is disposed. The localized glue-removal process is performed without affecting other regions of the EUV mask that do not have the glue disposed thereon. The localized glue-removal process may include injecting a cleaning chemical onto the glue and removing a waste chemical produced by the cleaning chemical and the glue. The localized glue-removal process may also include a plasma process that applies plasma to the glue. The localized glue-removal process may further include a laser process that shoots a focused laser beam at the glue.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: December 31, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Tzu-Ting Chou, Chung-Hsuan Liu, Kuan-Wen Lin, Chi-Lun Lu, Ting-Hao Hsu, Sheng-Chi Chin
  • Publication number: 20180031962
    Abstract: An extreme ultraviolet (EUV) mask is received. The EUV mask has an EUV pellicle disposed thereover. The EUV pellicle is coupled to the EUV mask at least in part via glue that is disposed on the EUV mask. The EUV pellicle is removed, thereby exposing the glue. A localized glue-removal process is performed by targeting a region of the EUV mask on which the glue is disposed. The localized glue-removal process is performed without affecting other regions of the EUV mask that do not have the glue disposed thereon. The localized glue-removal process may include injecting a cleaning chemical onto the glue and removing a waste chemical produced by the cleaning chemical and the glue. The localized glue-removal process may also include a plasma process that applies plasma to the glue. The localized glue-removal process may further include a laser process that shoots a focused laser beam at the glue.
    Type: Application
    Filed: July 29, 2016
    Publication date: February 1, 2018
    Inventors: Tzu-Ting Chou, Chung-Hsuan Liu, Kuan-Wen Lin, Chi-Lun Lu, Ting-Hao Hsu, Sheng-Chi Chin
  • Patent number: 9658526
    Abstract: A pellicle mask assembly includes a mask, a pellicle frame, and a pellicle membrane. The pellicle frame has a bottom side attached to the mask, and a top side covered by the pellicle membrane. The pellicle frame includes a coating on its inner surface and the coating is configured to monitor a change of environment inside the pellicle mask assembly. In embodiments, the change of environment includes increased humidity and/or increased chemical ion density inside the pellicle mask assembly. Methods of making and using the pellicle mask assembly are also disclosed.
    Type: Grant
    Filed: June 30, 2015
    Date of Patent: May 23, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuan-Wen Lin, Sheng-Chi Chin, Ting-Hao Hsu, Tzu-Ting Chou, Shu-Hsien Wu
  • Publication number: 20170003585
    Abstract: A pellicle mask assembly includes a mask, a pellicle frame, and a pellicle membrane. The pellicle frame has a bottom side attached to the mask, and a top side covered by the pellicle membrane. The pellicle frame includes a coating on its inner surface and the coating is configured to monitor a change of environment inside the pellicle mask assembly. In embodiments, the change of environment includes increased humidity and/or increased chemical ion density inside the pellicle mask assembly. Methods of making and using the pellicle mask assembly are also disclosed.
    Type: Application
    Filed: June 30, 2015
    Publication date: January 5, 2017
    Inventors: Kuan-Wen Lin, Sheng-Chi Chin, Ting-Hao Hsu, Tzu-Ting Chou, Shu-Hsien Wu