Patents by Inventor Tzu-Yao Lin

Tzu-Yao Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250068016
    Abstract: An electronic device is provided. The electronic device includes a first substrate; a second substrate disposed opposite to the first substrate; a liquid crystal layer disposed between the first substrate and the second substrate; a plurality of first electrodes disposed between the first substrate and the liquid crystal layer; a plurality of second electrodes disposed between the second substrate and the liquid crystal layer; a first signal line disposed between the first substrate and the liquid crystal layer, and electrically connected to one of the plurality of first electrodes; and a second signal line disposed between the second substrate and the liquid crystal layer, and electrically connected to one of the plurality of second electrodes. The first signal line and the second signal line include a blackened metal.
    Type: Application
    Filed: November 13, 2024
    Publication date: February 27, 2025
    Inventors: Ting-Wei LIANG, Jiunn-Shyong LIN, I-An YAO, Tzu-Chieh LAI, Chung-Chun CHENG, Shih-Che CHEN
  • Patent number: 12224322
    Abstract: An epitaxial structure includes a substrate, a buffer layer, a channel layer, a barrier layer, a diffusion barrier layer, and a P-type gallium nitride layer sequentially stacked from bottom to top. The P-type gallium nitride layer has a first lattice constant. The diffusion barrier layer includes a chemical composition of Inx1Aly1Gaz1N, where x1+y1+z1=1, 0?x1?0.3, 0?y1?1.0, and 0?z1?1.0. The chemical composition of the diffusion barrier layer has a proportional relationship so that the diffusion barrier layer has a second lattice constant that matches the first lattice constant, and the second lattice constant is between 80% and 120% of the first lattice constant.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: February 11, 2025
    Assignee: GLOBALWAFERS CO., LTD.
    Inventors: Tzu-Yao Lin, Jia-Zhe Liu, Ying-Ru Shih
  • Publication number: 20250013020
    Abstract: An imaging lens sequentially includes a prism, a first lens element, a second lens element, a third lens element, a fourth lens element, and a fifth lens element from an object side to an image side along an optical axis. The prism has a light incident surface. The light incident surface includes at least one phase delay structure being a circle and including a circle center and microstructures. Diopters of the first to fifth lens elements are respectively negative, negative, positive, positive, and negative. A spacing between two adjacent microstructures in a radial direction of the circle is the same. The first to fifth lens elements are aspheric lens elements. The imaging lens satisfies 3.86<TL/ImgH<9.8, where TL is a distance from an object side surface of the first lens element to an image plane on the optical axis, and ImgH is half of a diagonal of the image plane.
    Type: Application
    Filed: April 26, 2024
    Publication date: January 9, 2025
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Tzu-Yao Lin, Shih-Chieh Yen
  • Patent number: 12051724
    Abstract: A semiconductor epitaxy structure includes a silicon carbide substrate, a nucleation layer, a gallium nitride buffer layer, and a stacked structure. The nucleation layer is formed on the silicon carbide substrate, the gallium nitride buffer layer is disposed on the nucleation layer, and the stacked structure is formed between the nucleation layer and the gallium nitride buffer layer. The stacked structure includes: a plurality of silicon nitride (SiNx) layers and a plurality of aluminum gallium nitride (AlxGa1-xN) layers alternately stacked, wherein the first layer of the plurality of silicon nitride layers is in direct contact with the nucleation layer.
    Type: Grant
    Filed: May 30, 2022
    Date of Patent: July 30, 2024
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Tzu-Yao Lin, Jia-Zhe Liu, Ying-Ru Shih
  • Publication number: 20240125982
    Abstract: A metalens including a transparent substrate and lenses is provided. The lenses are located on the transparent substrate. Each of the lenses includes first columnar microstructures continuously arranged along a first direction and second columnar microstructures continuously arranged along a second direction. A pitch of the first columnar microstructure is different from a pitch of the second columnar microstructure.
    Type: Application
    Filed: November 18, 2022
    Publication date: April 18, 2024
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Tzu-Yao Lin, Shih-Chieh Yen
  • Publication number: 20240077409
    Abstract: A chiral molecule detector includes a light source, a photodetector, and a carrier. The carrier is configured to reflect at least part of light emitted by the light source to the photodetector. The carrier includes a substrate and a metal reflective layer. An upper surface of the substrate has a periodic hole array containing multiple holes. The metal reflective layer is located on the upper surface of the substrate, and covers a sidewall of the hole and a bottom surface of the hole.
    Type: Application
    Filed: November 28, 2022
    Publication date: March 7, 2024
    Applicant: GUANGZHOU LUXVISIONS INNOVATION TECHNOLOGY LIMITED
    Inventors: Tzu-Yao Lin, Shih-Chieh Yen
  • Publication number: 20230369447
    Abstract: A method of manufacturing a high electron mobility transistor (HEMT) structure is disclosed. By controlling a passivation layer and a barrier layer to uninterruptedly grow in the same growth chamber, defects of the passivation layer generated in the growth process due to a drastic change in temperature, pressure, or atmosphere or degrading a quality of an interface between the passivation layer and the barrier layer could be avoided, thereby providing the passivation layer with a good quality and the interface between the passivation layer and the barrier layer with a good quality, so that the objective of improving the performance of the HEMT structure could be achieved.
    Type: Application
    Filed: April 3, 2023
    Publication date: November 16, 2023
    Applicant: GLOBALWAFERS CO., LTD.
    Inventors: JIA-ZHE LIU, TZU-YAO LIN
  • Publication number: 20230138899
    Abstract: A semiconductor epitaxy structure includes a silicon carbide substrate, a nucleation layer, a gallium nitride buffer layer, and a stacked structure. The nucleation layer is formed on the silicon carbide substrate, the gallium nitride buffer layer is disposed on the nucleation layer, and the stacked structure is formed between the nucleation layer and the gallium nitride buffer layer. The stacked structure includes: a plurality of silicon nitride (SiNx) layers and a plurality of aluminum gallium nitride (AlxGa1-xN) layers alternately stacked, wherein the first layer of the plurality of silicon nitride layers is in direct contact with the nucleation layer.
    Type: Application
    Filed: May 30, 2022
    Publication date: May 4, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Tzu-Yao Lin, Jia-Zhe Liu, Ying-Ru Shih
  • Publication number: 20230045328
    Abstract: A semiconductor structure includes a substrate, a first nitride layer, a second nitride layer, a third nitride layer, and a polarity inversion layer. The first nitride layer is formed on the substrate, and the polarity inversion layer formed at a surface of the first nitride layer converts a non-metallic polar surface of the first nitride layer into a metallic polar surface of the polarity inversion layer. The second nitride layer is formed on the polarity inversion layer. The third nitride layer is formed on the second nitride layer.
    Type: Application
    Filed: May 26, 2022
    Publication date: February 9, 2023
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Po Jung Lin, Tzu-Yao Lin
  • Patent number: 11456362
    Abstract: An epitaxial structure and a semiconductor device are provided in which the epitaxial structure includes at least a SiC substrate, a nucleation layer, and a GaN layer. The nucleation layer is formed on the SiC substrate. The material of the nucleation layer is aluminum gallium nitride doped with a dopant, the Al content in the nucleation layer changes from high to low in the thickness direction, the lattice constant of the nucleation layer is between 3.08 ? and 3.21 ?, and the doping concentration of the nucleation layer changes from high to low in the thickness direction. The GaN layer is formed on the nucleation layer.
    Type: Grant
    Filed: November 19, 2020
    Date of Patent: September 27, 2022
    Assignee: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Tzu-Yao Lin, Ying-Ru Shih
  • Publication number: 20210336011
    Abstract: An epitaxial structure includes a substrate, a buffer layer, a channel layer, a barrier layer, a diffusion barrier layer, and a P-type gallium nitride layer sequentially stacked from bottom to top. The P-type gallium nitride layer has a first lattice constant. The diffusion barrier layer includes a chemical composition of Inx1Aly1Gaz1N, where x1+y1+z1=1, 0?x1?0.3, 0?y1?1.0, and 0?z1?1.0. The chemical composition of the diffusion barrier layer has a proportional relationship so that the diffusion barrier layer has a second lattice constant that matches the first lattice constant, and the second lattice constant is between 80% and 120% of the first lattice constant.
    Type: Application
    Filed: April 23, 2021
    Publication date: October 28, 2021
    Inventors: TZU-YAO LIN, JIA-ZHE LIU, YING-RU SHIH
  • Publication number: 20210151570
    Abstract: An epitaxial structure and a semiconductor device are provided in which the epitaxial structure includes at least a SiC substrate, a nucleation layer, and a GaN layer. The nucleation layer is formed on the SiC substrate. The material of the nucleation layer is aluminum gallium nitride doped with a dopant, the Al content in the nucleation layer changes from high to low in the thickness direction, the lattice constant of the nucleation layer is between 3.08 ? and 3.21 ?, and the doping concentration of the nucleation layer changes from high to low in the thickness direction. The GaN layer is formed on the nucleation layer.
    Type: Application
    Filed: November 19, 2020
    Publication date: May 20, 2021
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Tzu-Yao Lin, Ying-Ru Shih
  • Publication number: 20210148007
    Abstract: An epitaxial structure including at least a substrate, a nucleation layer, a buffer layer, a channel layer, a barrier layer, and a P-type aluminum indium gallium nitride layer is provided. The nucleation layer is formed on the substrate; the buffer layer is formed on the nucleation layer; the channel layer is formed on the buffer layer; the barrier layer is formed on the channel layer; and the P-type aluminum indium gallium nitride layer is formed on the barrier layer. The material of the P-type aluminum indium gallium nitride layer is AlInGaN with a P-type dopant, in which the contents of Al, In and Ga all change stepped-periodically or stepped-periodical-gradually in the thickness direction, and the doping concentration of the P-type dopant changes stepped-periodically or stepped-periodical-gradually in the thickness direction.
    Type: Application
    Filed: November 18, 2020
    Publication date: May 20, 2021
    Applicant: GlobalWafers Co., Ltd.
    Inventors: Jia-Zhe Liu, Tzu-Yao Lin, Ying-Ru Shih
  • Publication number: 20200009653
    Abstract: A manufacturing method of a graphene metal composite material includes the steps of providing metal powder including metal particles, graphene powder including graphene pieces and binder including wax material, wherein each graphene piece includes graphene molecules connected with each other and including six carbon atoms annually connected, and one of the carbon atom of each graphene molecule is bonded with a functional group by an SP3 bond; mixing the powders and the binder into a powder material, wherein the SP3 bond is heated and broken by friction, and the graphene molecules are connected with each other via the broken SP3 bond to wrap the respective metal particles; melting and molding the powder material to form a green part; removing the binder from the green part to form a brown part; and sintering the brown part to form a metal main part embedded a three-dimensional mash formed by the graphene molecules.
    Type: Application
    Filed: July 4, 2019
    Publication date: January 9, 2020
    Inventors: Wei-Lin TSENG, Yang-Ming SHIH, Tzu-Yao LIN
  • Patent number: 10529081
    Abstract: A depth image processing method and a depth image processing system are provided. The depth image processing method includes: capturing a first image and a second image; performing a feature comparison to acquire a plurality of feature pairs between the first image and the second image, wherein each of the feature pairs includes a feature in the first image and a corresponding feature in the second image; computing disparities of the feature pairs; computing a depth image through the first image and the second image when the disparities of the feature pairs are all smaller than a disparity threshold.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: January 7, 2020
    Assignee: Wistron Corporation
    Inventors: Sheng-Shien Hsieh, Kai-Chung Cheng, Yu-Wen Huang, Tzu-Yao Lin, Pin-Hong Liou
  • Publication number: 20180137636
    Abstract: A depth image processing method and a depth image processing system are provided. The depth image processing method includes: capturing a first image and a second image; performing a feature comparison to acquire a plurality of feature pairs between the first image and the second image, wherein each of the feature pairs includes a feature in the first image and a corresponding feature in the second image; computing disparities of the feature pairs; computing a depth image through the first image and the second image when the disparities of the feature pairs are all smaller than a disparity threshold.
    Type: Application
    Filed: January 12, 2018
    Publication date: May 17, 2018
    Applicant: Wistron Corporation
    Inventors: Sheng-Shien Hsieh, Kai-Chung Cheng, Yu-Wen Huang, Tzu-Yao Lin, Pin-Hong Liou
  • Patent number: 9948854
    Abstract: An imaging device adapted to be detachably disposed on an electronic device is provided. The imaging device includes a shell, an imaging module, a communication module and a touch element. The shell has a first surface and a second surface opposite to each other. The imaging module having a lens is disposed inside of the shell, and the lens is exposed on the first surface of the shell. The communication module is disposed in the shell and an end of the communication module is signally connected to the imaging module. The touch element is connected to the shell and movably contacts a sensing unit of the electronic device. Moreover, an imaging system and a control method thereof are also provided.
    Type: Grant
    Filed: January 11, 2016
    Date of Patent: April 17, 2018
    Assignee: Wistron Corporation
    Inventors: Sheng-Shien Hsieh, Hsiao-Chang Lin, Tzu-Yao Lin
  • Patent number: 9905023
    Abstract: A depth image processing method and a depth image processing system are provided. The depth image processing method includes: capturing a first image and a second image; performing a feature comparison to acquire a plurality of feature pairs between the first image and the second image, wherein each of the feature pairs includes a feature in the first image and a corresponding feature in the second image; computing disparities of the feature pairs; computing a depth image through the first image and the second image when the disparities of the feature pairs are all smaller than a disparity threshold.
    Type: Grant
    Filed: April 8, 2016
    Date of Patent: February 27, 2018
    Assignee: Wistron Corporation
    Inventors: Sheng-Shien Hsieh, Kai-Chung Cheng, Yu-Wen Huang, Tzu-Yao Lin, Pin-Hong Liou
  • Patent number: 9715717
    Abstract: The present invention provides an image processing method applied to a graphics processing unit including: receiving data of an image, wherein the image is a first rectangle constituted by a plurality of pixels, and the pixels of the image are represented by a plurality of image values with a predetermined bit depth in the data; using a predetermined number of bits to perform an accumulation of the image values of the pixels for constructing an integral image of the image, wherein the predetermined number of bits is less than log2(W×H×2k) number of bits, W is the width of the first rectangle, H is the length of the first rectangle, and k is the predetermined bit depth.
    Type: Grant
    Filed: June 15, 2015
    Date of Patent: July 25, 2017
    Assignee: Wistron Corp.
    Inventors: Pin-Hong Liou, Tzu Yao Lin
  • Publication number: 20170186171
    Abstract: A depth image processing method and a depth image processing system are provided. The depth image processing method includes: capturing a first image and a second image; performing a feature comparison to acquire a plurality of feature pairs between the first image and the second image, wherein each of the feature pairs includes a feature in the first image and a corresponding feature in the second image; computing disparities of the feature pairs; computing a depth image through the first image and the second image when the disparities of the feature pairs are all smaller than a disparity threshold.
    Type: Application
    Filed: April 8, 2016
    Publication date: June 29, 2017
    Inventors: Sheng-Shien Hsieh, Kai-Chung Cheng, Yu-Wen Huang, Tzu-Yao Lin, Pin-Hong Liou