Patents by Inventor Tzu-Yi Chuang

Tzu-Yi Chuang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11635930
    Abstract: An image control device and an image control method are provided. The image control device includes a control command output port, an image input port, a processor and an image output unit. The control command output port transmits a scene switching command to an image source device; the image input port receives an image stream from the image source device; the processor is coupled to the image input port and the control command output port to retrieve a first image and a second image from the image stream, wherein the second image corresponds to the scene switching command; the image output unit is coupled to the processor and outputs the first image and the second image, wherein the first image is displayed in a first display area and the second image is displayed in a second display area.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: April 25, 2023
    Assignee: Aten International Co., Ltd.
    Inventors: Tzu-Yi Chuang, Ding-Yuan Wang, Syuan-You Liao, Chih-Chiang Chang
  • Publication number: 20220391157
    Abstract: An image control device and an image control method are provided. The image control device includes a control command output port, an image input port, a processor and an image output unit. The control command output port transmits a scene switching command to an image source device; the image input port receives an image stream from the image source device; the processor is coupled to the image input port and the control command output port to retrieve a first image and a second image from the image stream, wherein the second image corresponds to the scene switching command; the image output unit is coupled to the processor and outputs the first image and the second image, wherein the first image is displayed in a first display area and the second image is displayed in a second display area.
    Type: Application
    Filed: May 12, 2022
    Publication date: December 8, 2022
    Applicant: Aten International Co., Ltd.
    Inventors: Tzu-Yi Chuang, Ding-Yuan Wang, Syuan-You Liao, Chih-Chiang Chang
  • Patent number: 9490141
    Abstract: A method for planarizing a semiconductor device includes steps herein. A substrate is provided, on which a stop layer is formed. A trench is formed in the substrate. A first semiconductor film is deposited conformally on the stop layer and the trench. A second semiconductor film is deposited to fill the trench and cover the first semiconductor film. A chemical-mechanical polishing process is performed until the stop layer is exposed. A removal rate of the chemical-mechanical polishing process on the first semiconductor film is higher than that on the second semiconductor film. The first dielectric layer on the substrate selectively is removed.
    Type: Grant
    Filed: December 30, 2014
    Date of Patent: November 8, 2016
    Assignee: UNITED MICROELECTRONICS CORPORATION
    Inventors: Wei-Nan Fang, Jiann-Shiun Chen, Tzu-Yi Chuang
  • Publication number: 20160155649
    Abstract: A method for planarizing a semiconductor device includes steps herein. A substrate is provided, on which a stop layer is formed. A trench is formed in the substrate. A first semiconductor film is deposited conformally on the stop layer and the trench. A second semiconductor film is deposited to fill the trench and cover the first semiconductor film. A chemical-mechanical polishing process is performed until the stop layer is exposed. A removal rate of the chemical-mechanical polishing process on the first semiconductor film is higher than that on the second semiconductor film. The first dielectric layer on the substrate selectively is removed.
    Type: Application
    Filed: December 30, 2014
    Publication date: June 2, 2016
    Inventors: WEI-NAN FANG, JIANN-SHIUN CHEN, TZU-YI CHUANG
  • Publication number: 20090098734
    Abstract: A method of forming an STI structure is described. A patterned mask layer is formed over a substrate of a wafer. A portion of the substrate exposed by the patterned mask layer is removed to form trenches. A dielectric layer is formed over the substrate filling the trenches. A first CMP process is performed to remove a portion of the dielectric layer. A second CMP process is performed to remove a further portion of the dielectric layer and a portion of the patterned mask layer, such that the surface of the dielectric layer is lower than that of the patterned mask layer. The polishing rate in the second CMP process is lower than that in the first one. The polishing selectivity of the dielectric layer to the mask layer in the second CMP process is higher than that in the first one. The patterned mask layer is then removed.
    Type: Application
    Filed: October 16, 2007
    Publication date: April 16, 2009
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventor: Tzu-Yi Chuang
  • Patent number: 7510974
    Abstract: A CMP process is provided. A first polishing process on a wafer is performed using a first hard polishing pad with a first slurry. Then, a buffering process on the wafer is performed using a soft polishing pad with a cleaning agent to buffer the pH value in the first polishing process and to remove at least portion of the first slurry and the cleaning agent by the contact with the first soft polishing pad simultaneously. Thereafter, a second polishing process on the wafer is performed using a second hard polishing pad with a second slurry such that the pH value after the buffering process is between the pH value in the first polishing process and the pH value in the second polishing process. The method can avoid the scratch issue of wafer surface by particles resulting from pH shock and cross contamination.
    Type: Grant
    Filed: May 5, 2006
    Date of Patent: March 31, 2009
    Assignee: United Microelectronics Corp.
    Inventors: Chih-Yueh Li, Kai-Chun Yang, Tzu-Yi Chuang, Chien-Hsuan Chen, Min-Hao Yeh
  • Publication number: 20070259525
    Abstract: A CMP process is provided. A first polishing process on a wafer is performed using a first hard polishing pad with a first slurry. Then, a buffering process on the wafer is performed using a soft polishing pad with a cleaning agent to buffer the pH value in the first polishing process and to remove at least portion of the first slurry and the cleaning agent by the contact with the first soft polishing pad simultaneously. Thereafter, a second polishing process on the wafer is performed using a second hard polishing pad with a second slurry such that the pH value after the buffering process is between the pH value in the first polishing process and the pH value in the second polishing process. The method can avoid the scratch issue of wafer surface by particles resulting from pH shock and cross contamination.
    Type: Application
    Filed: May 5, 2006
    Publication date: November 8, 2007
    Inventors: Chih-Yueh Li, Kai-Chun Yang, Tzu-Yi Chuang, Chien-Hsuan Chen, Min-Hao Yeh