Abstract: A method of handling trim commands in a flash memory is provided. The method comprises: receiving a trim command; modifying logical-to-physical (L2P) address mapping entries of a L2P address mapping table according to the trim command; and storing trim information of the trim command into one of data blocks of the flash memory after modifying the L2P address mapping entries according to the trim command.

Abstract: The present invention provides a method for controlling a flash memory module. The method includes the steps of: after the flash memory module is powered on, determining whether the flash memory module encountered an abnormal power failure before the flash memory module is powered on; if the flash memory module encounters the abnormal power failure before the flash memory module is powered on, determining a last super block written by the flash memory module before powering on, where the super block includes multiple first blocks; determining a last rewritten page of the super block; determining a check range of the super block according to the last written page of the super block; determining a data weak region of the super block by reading the pages of the check range; and moving data in the weak data region to other regions of the super block or to another super block.

Abstract: The present invention provides a method for controlling a flash memory module. The flash memory module includes a plurality of dies, each die includes a plurality of blocks, each block includes a plurality of pages, and the method includes the steps of: selecting a super block, wherein the super block includes a plurality of first blocks respectively located in the plurality of dies; for each first block in the super block, determining whether the first block is a full block or a blank block; and if the first block is not the full block or the blank block, writing dummy data to the first block so that the first block becomes the full block; and erasing the plurality of first blocks in the super block, so that the plurality of first blocks become a plurality of blank blocks.

Abstract: The present invention provides a method for controlling a flash memory module. The method includes: after the flash memory module is powered on, determining whether the flash memory module encountered an abnormal power failure before the flash memory module is powered on; if the flash memory module encounters the abnormal power failure before the flash memory module is powered on, determining a last super block written by the flash memory module before powering on, where the super block comprises multiple first blocks respectively located in the multiple dies; for each first block in the super block, determining a last successfully read page of the first block; determining a data weak region of the super block according to the last successfully read pages of the first blocks in the super block; and moving data in the weak data region to other regions of the super block or to another super block.

Abstract: A method used in a flash memory controller includes: using an error correction code (ECC) circuit to perform an ECC operation upon data of a block of a flash memory chip/die of a flash memory device to generate an ECC result; when the ECC result indicates a failure, storing an access task corresponding to the block into a specific buffer; and, controlling a voltage generator of the flash memory device through a specific communication interface to control at least one address decoder of the flash memory device to access the block of the flash memory chip/die again according to at least one threshold voltage level of the voltage generator after the access task has been temporarily stored in the specific buffer for a specific default time.

Abstract: The present invention provides a method for accessing a flash memory module, wherein the method includes the steps of: configuring the flash memory module to have a super block, wherein the super block comprises a plurality of blocks respectively located in a plurality of dies; encoding M data respectively to sequentially generate M temporary parities, wherein M is a positive integer greater than two; storing the M temporary parities into N areas of a buffer sequentially, wherein N is less than M, each of the N areas is only allowed to store one temporary parity, and a first part of the N areas is always used to store a portion temporary parities of the M temporary parities and their subsequent updated temporary parities; and generating M parities according to the M temporary parities, respectively, and writing the M parities into the super block.

Abstract: A method of performing a wear-leveling operation in a flash memory includes: determining a block age for each of a plurality of blocks in the flash memory according to a number of erase operations that have been performed on the flash memory after the block is erased; selecting one or more candidate source blocks from the plurality of blocks by comparing block ages of the plurality of blocks with an age limit; determining a source block from the one or more candidate source blocks according to erase counts or block ages of the one or more candidate source blocks; and performing the wear-leveling operation on the source block.

Abstract: A method of a storage device to be externally coupled to a host device via a specific communication interface includes: providing a flash memory unit comprising at least one flash memory; counting an outstanding command number for at least one submission queue which is used for storing information of unfinished commands; counting a completion command number for at least one completion queue which is used for storing information of finished commands; and, generating and outputting an interrupt event from the storage device to the host device when a comparison result of the counted outstanding command number with the counted completion command number matches a specific condition.

Abstract: An optical element, and a metrology tool or system employing the optical element for measurements of structures on a substrate. The optical element includes a first portion configured to reflect the light received from an illumination source towards the substrate, and a second portion configured to transmit the light redirected from the substrate or a desired location, the first portion having a higher coefficient of reflectivity than the second portion, and the second portion having a higher coefficient of transmissivity than the first portion. A metrology tool may include the optical elements and a sensor configured to receive a diffraction pattern caused by radiation redirected from a substrate, and a processor configured to receive a signal relating to the diffraction pattern from the sensor, and determine overlay associated with the substrate by analyzing the signal.

Abstract: A method of managing operation commands for a flash memory includes: providing a first command queue for receiving and storing a plurality of normal operation commands; providing at least one word line read (IWLR) command queue for receiving and storing a plurality of IWLR operation commands; issuing a lock state command between each two consecutive IWLR operation commands to the at least one second command queue; determining a selected command queue from the first command queue and the at least one IWLR command queues according to the lock state command; and delivering an operation command from the selected command queue to the flash memory.

Abstract: A method for performing data access control of a memory device with aid of a predetermined command and associated apparatus are provided. The method may include: utilizing the memory controller to receive a first single command from a host device through a transmission interface circuit of the memory controller; and in response to the first single command conforming to a predetermined format of the predetermined command, utilizing the memory controller to perform a series of operations according to the first single command, wherein the first single command represents a first migrate command, for migrating from a first source logical address to a first destination logical address. The series of operations may include: reading first data at the first source logical address; writing the first data at the first destination logical address; and controlling the memory device to make the first data at the first source logical address become invalid data.

Abstract: A method of handling trim commands in a flash memory is provided. The method comprises: receiving a trim command; modifying logical-to-physical (L2P) address mapping entries of a L2P address mapping table according to the trim command; and storing trim information of the trim command into one of data blocks of the flash memory after modifying the L2P address mapping entries according to the trim command.

Abstract: A method of managing operation commands for a flash memory includes: providing a first command queue for receiving and storing a plurality of normal operation commands; providing at least one word line read (IWLR) command queue for receiving and storing a plurality of IWLR operation commands; issuing a lock state command between each two consecutive IWLR operation commands to the at least one second command queue; determining a selected command queue from the first command queue and the at least one IWLR command queues according to the lock state command; and delivering an operation command from the selected command queue to the flash memory.

Abstract: A method for performing data access control of a memory device with aid of a predetermined command and associated apparatus are provided. The method may include: utilizing the memory controller to receive a first single command from a host device through a transmission interface circuit of the memory controller; and in response to the first single command conforming to a predetermined format of the predetermined command, utilizing the memory controller to perform a series of operations according to the first single command, wherein the first single command represents a first duplicate command, for duplicating from a first source logical address to a first destination logical address. The series of operations may include: reading first data at the first source logical address; and writing the first data at the first destination logical address.

Abstract: A spatial positioning method is provided. The method includes steps of: dividing an activity space into a plurality of activity regions; selecting a plurality of positions in the activity space or within a distance range of the activity space as a plurality of base station candidate positions; predicting connection states between the plurality of base stations that are disposed respectively at the plurality of station candidate positions and a mobile robot moving to each of the plurality of activity regions; selecting some of the base station candidate positions as a plurality of base station positions according to the connection states; disposing the plurality of base stations respectively at the plurality of base station positions; and wirelessly connecting the mobile robot respectively moving to the plurality of activity regions to some of the plurality of base stations to position the mobile robot.

Abstract: A method of a storage device to be externally coupled to a host device via a specific communication interface includes: providing a flash memory unit comprising at least one flash memory; counting an outstanding command number for at least one submission queue which is used for storing information of unfinished commands; counting a completion command number for at least one completion queue which is used for storing information of finished commands; and, generating and outputting an interrupt event from the storage device to the host device when a comparison result of the counted outstanding command number with the counted completion command number matches a specific condition.

Abstract: A method of managing a garbage collection (GC) operation on a flash memory includes: calculating an overall spare area in a flash memory, which includes a spare area in a plurality of spare blocks in the flash memory and at least two of a spare area in one or more target blocks corresponding to writing of user data based on host write commands, a spare area in one or more destination blocks corresponding to writing of valid data based on the GC operation and a spare area in a source block corresponding to reading of valid data based on the GC operation; determining an adjustment factor according to the overall spare area; and performing the GC operation on the source block according to a GC-to-host base ratio and the adjustment factor.

Abstract: A method of managing a garbage collection (GC) operation on a flash memory includes: setting a GC starting threshold, wherein the GC starting threshold indicates a predetermined spare block number that is higher than a target spare block number of spare blocks maintained by a flash translation layer (FTL) of the flash memory; determining whether to start the GC operation according to a current number of spare blocks in the flash memory and the GC starting threshold; and performing the GC operation on a source block in the flash memory when the current number of spare blocks is lower than or equal to the GC starting threshold.

Abstract: A method of managing a garbage collection (GC) operation includes: comprising: selecting a source block and at least one candidate source block from the flash memory; calculating an overall valid page percentage according to a number of valid pages in the source block and the at least one candidate source block; determining a GC-to-host base ratio according to the overall valid page percentage; and performing the GC operation on the source block according to at least the GC-to-host base ratio.

Abstract: A data storage device includes a memory device and a memory controller. The memory controller configures a first memory block which is a TLC memory blocks as a data buffer, and accordingly configures a plurality of second memory blocks which are SLC memory blocks. The memory controller uses the first memory block to receive data and accordingly store same data in the second memory blocks as backup data. When an amount of available memory space of the first memory block is smaller than or equal to a predetermined amount, the memory controller determines whether any error has occurred in the data stored in the first memory block. When there is any error occurred in the data stored in the first memory block, the memory controller configures a third memory block and move the backup data stored in the second memory block to the third memory block.