Patents by Inventor Tzu-Ying LEE

Tzu-Ying LEE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929425
    Abstract: The current disclosure describes techniques for forming a low resistance junction between a source/drain region and a nanowire channel region in a gate-all-around FET device. A semiconductor structure includes a substrate, multiple separate semiconductor nanowire strips vertically stacked over the substrate, a semiconductor epitaxy region adjacent to and laterally contacting each of the multiple separate semiconductor nanowire strips, a gate structure at least partially over the multiple separate semiconductor nanowire strips, and a dielectric structure laterally positioned between the semiconductor epitaxy region and the gate structure. The first dielectric structure has a hat-shaped profile.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: March 12, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tzu-Chung Wang, Chao-Ching Cheng, Tzu-Chiang Chen, Tung Ying Lee
  • Publication number: 20220114292
    Abstract: The present invention relates to a structure analyzing method. The method includes dividing a physical structure into a plurality of virtual elements in accordance with a structural geometry of the physical structure and establishing a discrete increment secant iterative model including an equivalent nodal secant mass coefficient and an equivalent nodal secant mass damping coefficient; implementing an increment-secant iterative algorithm to repeatedly compute until convergence a secant mass coefficient slope corresponding to the equivalent nodal secant mass coefficient and a secant mass damping coefficient slope corresponding to the equivalent nodal secant mass damping coefficient; and replacing the equivalent nodal secant mass coefficient and the equivalent nodal secant mass damping coefficient by the converged secant mass coefficient slope and the converged secant mass damping coefficient slope respectively.
    Type: Application
    Filed: October 20, 2020
    Publication date: April 14, 2022
    Applicant: National Central University
    Inventors: TZU-YING LEE, WEN-HSIAO HUNG
  • Publication number: 20200401745
    Abstract: The present invention relates to a structure analyzing method, characterized in that a computer is configured to execute a process, including steps of establishing a spatial-temporal discrete governing model for a discontinuous nonlinear structure based on a finite element analysis, in which the spatial-temporal discrete governing model includes an equivalent nodal secant damping coefficient and an equivalent nodal secant stiffness coefficient at current time step; repeatedly calculating until convergence a secant damping coefficient slope and a secant stiffness coefficient slope based on known parameters, the known equivalent nodal secant damping coefficient and the known equivalent nodal secant stiffness coefficient at previous time step through a computer iteration algorithm; and replacing the equivalent nodal secant damping coefficient and the equivalent nodal secant stiffness coefficient by the converged secant damping coefficient slope and the converged secant stiffness coefficient slope acting as initi
    Type: Application
    Filed: November 19, 2019
    Publication date: December 24, 2020
    Applicant: National Central University
    Inventors: Tzu-Ying LEE, Wen-Hsiao HUNG, Kun-Jun CHUNG, Hao CHANG