Patents by Inventor Tzu-Yuan Chao

Tzu-Yuan Chao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230013733
    Abstract: The invention relates to a microcarrier, comprising a continuous medium of a biocompatible polymer for culturing cells and having a three-dimensional scaffold architecture delineated peripherally by a continuous outer wall, in which spherical macropores are stacked to one another and interconnected by connecting pores. The continuous outer wall is formed with exposure pores at positions where it is in contact with the macropores, through which the interior of the microcarrier may be in fluid communication with the ambient culture medium. The microcarrier herein is produced by cast-molding and, therefore, has a continuous outer wall which provides additional mechanical strength while maintaining high porosity. The microcarrier thus produced is configured in the form of a basic geometrical body. The invention further relates to a cast-molding process for producing the microcarrier.
    Type: Application
    Filed: July 13, 2021
    Publication date: January 19, 2023
    Inventors: Pan LIN, Tzu-Yuan CHAO, Guan-Chi CHEN, Yi-Fan HSIEH
  • Patent number: 11530256
    Abstract: The present disclosure relates to an antibody or antigen-binding fragment thereof that specifically bind to ?-toxin of Staphylococcal aureus. The present disclosure also relates to a pharmaceutical composition, a method for treating and/or preventing diseases and/or disorders caused by Staphylococcal aureus infection in a subject in need, and a method for detecting ?-toxin of Staphylococcal aureus in a sample.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: December 20, 2022
    Assignee: SYNERMORE BIOLOGICS (SUZHOU) CO., LTD.
    Inventors: Tzu-Yuan Chao, Ching-Wen Chang, Eric Tsao
  • Publication number: 20210317193
    Abstract: The present disclosure relates to an antibody or antigen-binding fragment thereof that specifically bind to ?-toxin of Staphylococcal aureus. The present disclosure also relates to a pharmaceutical composition, a method for treating and/or preventing diseases and/or disorders caused by Staphylococcal aureus infection in a subject in need, and a method for detecting ?-toxin of Staphylococcal aureus in a sample.
    Type: Application
    Filed: March 24, 2021
    Publication date: October 14, 2021
    Inventors: Tzu-Yuan CHAO, Ching-Wen CHANG, Eric TSAO
  • Patent number: 8957498
    Abstract: The present invention relates to an on-chip electronic device and a method for manufacturing the same. The on-chip electronic device according to the present invention comprises a substrate, a porous layer, a plurality of magnetic bodies, and an electronic member layer. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of magnetic bodies is disposed in the plurality of voids, respectively; and the electronic member layer is disposed on one side of the porous layer, such as upper side of or lower sider of the porous layer. Because the plurality of magnetic bodies is used as the core of the inductance, the inductance is increased effectively and the area of the on-chip electronic device is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
    Type: Grant
    Filed: May 31, 2012
    Date of Patent: February 17, 2015
    Assignee: National Chiao Tung University
    Inventors: Yu-Ting Cheng, Tzu-Yuan Chao, Kuan-Ming Chen, Hsin-Fu Hsu
  • Publication number: 20130234314
    Abstract: A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.
    Type: Application
    Filed: April 24, 2013
    Publication date: September 12, 2013
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: TZU-YUAN CHAO, CHIA-WEI LIANG, YU-TING CHENG
  • Patent number: 8481364
    Abstract: A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: July 9, 2013
    Assignee: National Chiao Tung University
    Inventors: Tzu-Yuan Chao, Chia-Wei Liang, Yu-Ting Cheng
  • Patent number: 8373250
    Abstract: The present invention relates to a an on-chip inductor structure and a method for manufacturing the same. The an on-chip inductor structure according to the present invention comprises a substrate, a porous layer, a plurality of conductors, and an inductor. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of conductors is disposed in the plurality of voids, respectively; and the inductor is disposed on the porous layer. Because the plurality of conductors is used as the core of the inductor, the inductance is increased effectively and the area of the an on-chip inductor is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
    Type: Grant
    Filed: October 28, 2009
    Date of Patent: February 12, 2013
    Assignee: National Chiao Tung University
    Inventors: Tzu-Yuan Chao, Ming-Chieh Hsu, Yu-Ting Cheng, Chih Chen, Chien-Min Lin
  • Publication number: 20120235275
    Abstract: The present invention relates to an on-chip electronic device and a method for manufacturing the same. The on-chip electronic device according to the present invention comprises a substrate, a porous layer, a plurality of magnetic bodies, and an electronic member layer. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of magnetic bodies is disposed in the plurality of voids, respectively; and the electronic member layer is disposed on one side of the porous layer, such as upper side of or lower sider of the porous layer. Because the plurality of magnetic bodies is used as the core of the inductance, the inductance is increased effectively and the area of the on-chip electronic device is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
    Type: Application
    Filed: May 31, 2012
    Publication date: September 20, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: YU-TING CHENG, TZU-YUAN CHAO, KUAN-MING CHEN, HSIN-FU HSU
  • Publication number: 20120032320
    Abstract: A fabrication method for integrating chip(s) onto a flexible substrate in forming a flexible micro-system. The method includes a low-temperature flip-chip and a wafer-level fabrication process. Using the low-temperature flip-chip technique, the chip is bonded metallically onto the flexible substrate. To separate the flexible substrate from the substrate, etching is used to remove the sacrificial layer underneath the flexible substrate. The instant disclosure applies standardized micro-fabrication process for integrating chip(s) onto the flexible substrate. Without using special materials or fabrication procedures, the instant disclosure offers a cost-effective fabrication method for flexible micro-systems.
    Type: Application
    Filed: October 7, 2010
    Publication date: February 9, 2012
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: TZU-YUAN CHAO, CHIA-WEI LIANG, YU-TING CHENG
  • Publication number: 20110042782
    Abstract: The present invention relates to a an on-chip inductor structure and a method for manufacturing the same. The an on-chip inductor structure according to the present invention comprises a substrate, a porous layer, a plurality of conductors, and an inductor. The porous layer is disposed on the substrate and has a plurality of voids; each of the plurality of conductors is disposed in the plurality of voids, respectively; and the inductor is disposed on the porous layer. Because the plurality of conductors is used as the core of the inductor, the inductance is increased effectively and the area of the an on-chip inductor is reduced. Besides the manufacturing method according to the present invention is simple and compatible with the current CMOS process, the manufacturing cost can be lowered.
    Type: Application
    Filed: October 28, 2009
    Publication date: February 24, 2011
    Applicant: NATIONAL CHIAO TUNG UNIVERSITY
    Inventors: TZU-YUAN CHAO, MING-CHIEH HSU, YU-TING CHENG, CHIH CHEN, CHIEN-MIN LIU