Abstract: An electronic device is provided. The electronic device includes a first panel. The first panel includes a first substrate, a second substrate, a liquid crystal layer, a first transparent electrode, a second transparent electrode, and a first signal line. The second substrate is opposite to the first substrate. The liquid crystal layer is disposed between the first substrate and the second substrate. The first transparent electrode is disposed between the first substrate and the liquid crystal layer. The second transparent electrode is disposed between the second substrate and the liquid crystal layer. The first signal line is electrically connected to the first transparent electrode and extending along a first direction. The impedance of the first signal line is less than the impedance of the first transparent electrode.

Abstract: The present invention provides a driving method applied to the CH-LCD active matrix, which uses a plurality of gates or drains to control a single CH-LCD pixel unit, respectively controls the CH-LCD pixel unit in the resetting stage and the determining stage to increase a charging time for the CH-LCD pixel unit. Besides, the method further divides the plurality of scan lines and data lines into a plurality of groups to control each group of CH-LCD pixel units at the same time. Therefore, the charging time for the CH-LCD pixel unit may be increased for a fixed frame rate and a fixed resolution.

Abstract: The invention provides a cholesteric liquid crystal display device, which includes a first substrate, a second substrate, a cholesteric liquid crystal layer, a switch, and a black light absorption layer. The first substrate includes a first surface and a second surface opposite to the first surface. The switch is disposed on the first surface of the first substrate. The second substrate is disposed opposite to the first substrate. The cholesteric liquid crystal layer is disposed between the first substrate and the second substrate. The black light absorption layer is disposed between the switch and the cholesteric liquid crystal layer, or on the second surface of the first substrate.

Abstract: A GOA circuit applied to a liquid crystal display is disclosed, which comprises a plurality of cascaded shift register units, an (N)th level shift register unit is controlled to charge an (N)th level scanning line accordingly. The (N)th level shift register unit includes a pull-up circuit, a pull-down circuit, a pull-down sustain circuit, a pull-up control circuit, a down transfer circuit, and an bootstrap capacitor, and a display device is also disclosed herein. By replacing scanning lines with a constant voltage VDD or two voltages to accomplish the function of down transfer, the loading of scanning lines and the risk which comes with wiring step-by-step are decreased, forward-scanning operation and backward-scanning operation are accomplished accordingly.

Abstract: A GOA circuit applied to a liquid crystal display is disclosed, which comprises a plurality of cascaded shift register units, an (N)th level shift register unit is controlled to charge an (N)th level scanning line accordingly. The (N)th level shift register unit includes a pull-up circuit, a pull-down circuit, a pull-down sustain circuit, a pull-up control circuit, a down transfer circuit, and an bootstrap capacitor, and a display device is also disclosed herein. By replacing scanning lines with a constant voltage VDD or two voltages to accomplish the function of down transfer, the loading of scanning lines and the risk which comes with wiring step-by-step are decreased, forward-scanning operation and backward-scanning operation are accomplished accordingly.

Abstract: An n-th stage array substrate row driving unit of a row driving circuit for an array substrate is provided. The n-th stage array substrate row driving unit comprises an (n?3)-th and an (n?2)-th stage signal input terminal and a pull-up controlling unit. The pull-up controlling unit is a first thin film transistor and is connected to the (n?2)-th and a (n?3)-th stage signal input terminal. A peak voltage of the (n?3)-th stage signal input terminal is twice a peak voltage of the (n?2)-th stage signal input terminal. Thus, the threshold voltage shift of the TFT elements can be avoided, and the stability of the output can be improved.

Abstract: An n-th stage array substrate row driving unit of a row driving circuit for an array substrate is provided. The n-th stage array substrate row driving unit comprises an (n?3)-th and an (n?2)-th stage signal input terminal and a pull-up controlling unit. The pull-up controlling unit is a first thin film transistor and is connected to the (n?2)-th and a (n?3)-th stage signal input terminal. A peak voltage of the (n?3)-th stage signal input terminal is twice a peak voltage of the (n?2)-th stage signal input terminal. Thus, the threshold voltage shift of the TFT elements can be avoided, and the stability of the output can be improved.

Abstract: A repairing method for a pixel structure including an active device, a pixel electrode connected with the active device, a bottom electrode disposed under the pixel electrode, upper electrodes disposed between the pixel electrode and the bottom electrode and connected with the pixel electrode, a first dielectric layer disposed between the bottom electrode and the upper electrodes and a second dielectric layer disposed between the upper electrodes and the pixel electrode is provided. The repairing method includes removing a portion of the pixel electrode to electrically isolate the contact region over the upper electrode from the remaining portion of the pixel electrode, wherein a storage capacitor is formed by the reserved region over the upper electrode, the second dielectric layer and the remaining portion of the pixel electrode.

Abstract: A repairing method for a pixel structure including an active device, a pixel electrode connected with the active device, a bottom electrode disposed under the pixel electrode, upper electrodes disposed between the pixel electrode and the bottom electrode and connected with the pixel electrode, a first dielectric layer disposed between the bottom electrode and the upper electrodes and a second dielectric layer disposed between the upper electrodes and the pixel electrode is provided. The repairing method includes removing a portion of the pixel electrode to electrically isolate the contact region over the upper electrode from the remaining portion of the pixel electrode, wherein a storage capacitor is formed by the reserved region over the upper electrode, the second dielectric layer and the remaining portion of the pixel electrode.

Abstract: A pixel structure including an active device, a pixel electrode connected with the active device, a bottom electrode disposed under the pixel electrode, upper electrodes disposed between the pixel electrode and the bottom electrode and connected with the pixel electrode, a first dielectric layer disposed between the bottom electrode and the upper electrodes and a second dielectric layer disposed between the upper electrodes and the pixel electrode is provided. The total area of the upper electrodes overlapping with the bottom electrode is A, and the overlapping portion of the pixel electrode and each upper electrode includes a contact region and a reserved region having total area B. The dielectric constant and thickness of the first dielectric layer is ?1 and d1; and for second dielectric layer ?2 and d2, wherein 0.5<(?1·d2·A)/(?2·d1·B)<1.5.

Abstract: A pixel structure including an active device, a pixel electrode connected with the active device, a bottom electrode disposed under the pixel electrode, upper electrodes disposed between the pixel electrode and the bottom electrode and connected with the pixel electrode, a first dielectric layer disposed between the bottom electrode and the upper electrodes and a second dielectric layer disposed between the upper electrodes and the pixel electrode is provided. The total area of the upper electrodes overlapping with the bottom electrode is A, and the overlapping portion of the pixel electrode and each upper electrode includes a contact region and a reserved region having total area B. The dielectric constant and thickness of the first dielectric layer is ?1 and d1; and for second dielectric layer ?2 and d2, wherein 0.5<(?1·d2·A)/(?2·d1·B)<1.5.