Abstract: The present disclosure provides a contact window structure. In the contact window structure, a first insulating layer, having a first opening, is positioned on a first metal layer, wherein the first opening exposes a part of the first metal layer. A second metal layer covers the first opening and contacts with the first metal layer via the first opening. A second insulating layer, having a second opening, is positioned on the first insulating layer, wherein the second opening exposes a part of the second layer and the first insulating layer. The projection area of the second opening on the first metal layer covers the projection area of the first opening on the first metal layer. A pixel structure containing the contact window structure and a manufacturing method thereof are also provided herein.

Abstract: The present disclosure provides a contact window structure. In the contact window structure, a first insulating layer, having a first opening, is positioned on a first metal layer, wherein the first opening exposes a part of the first metal layer. A second metal layer covers the first opening and contacts with the first metal layer via the first opening. A second insulating layer, having a second opening, is positioned on the first insulating layer, wherein the second opening exposes a part of the second layer and the first insulating layer. The projection area of the second opening on the first metal layer covers the projection area of the first opening on the first metal layer. A pixel structure containing the contact window structure and a manufacturing method thereof are also provided herein.

Abstract: The present disclosure provides a contact window structure. In the contact window structure, a first insulating layer, having a first opening, is positioned on a first metal layer, wherein the first opening exposes a part of the first metal layer. A second metal layer covers the first opening and contacts with the first metal layer via the first opening. A second insulating layer, having a second opening, is positioned on the first insulating layer, wherein the second opening exposes a part of the second layer and the first insulating layer. The projection area of the second opening on the first metal layer covers the projection area of the first opening on the first metal layer. A pixel structure containing the contact window structure and a manufacturing method thereof are also provided herein.

Abstract: An active device circuit substrate includes a substrate, a plurality of active devices, and a first planarization layer. Each active device includes a gate electrode, a channel layer stacked with the gate electrode, a source electrode, and a drain electrode. The source electrode and the drain electrode are disposed on the channel layer and located on opposite sides of the channel layer to define a channel area of the channel layer. The active devices include a first active device and a second active device. The first active device is disposed between the first planarization layer and the substrate, and the first planarization layer is disposed between the first active device and the second active device. A minimum linear distance between the channel area of the first active device and the channel area of the second active device along a direction parallel to the substrate is not smaller than 5 ?m.

Abstract: A reflective display device includes a drive array substrate, an electrophoretic display film, a reflective optical film and a light source module. The electrophoretic display film is disposed on the drive array substrate and includes a plurality of display mediums. The reflective optical film is disposed on the electrophoretic display film. The light source module is disposed beside the reflective optical film. A light emitting from the light source module is reflected to the electrophoretic display film by the reflective optical film. The light source module includes a plurality of first-color light sources, a plurality of second-color light sources and a plurality of third-color light sources which are switched on in sequence. The reflective display device is in a color display mode when the light source module is turned on. The reflective display device is in a monochrome display mode when the light source module is turned off.

Abstract: A thin film transistor (TFT) is provided, which includes a substrate, a first gate layer, an insulation layer, a first source/drain layer, a second source/drain layer, a semiconductor layer, a passivation layer and a second gate layer. The first gate layer is disposed on the substrate. The insulation layer is disposed on the first gate layer. The first source/drain layer is disposed on the insulation layer. The second source/drain layer is disposed on the insulation layer. The semiconductor layer is disposed on the insulation layer and covers the first source/drain layer and the second source/drain layer. The passivation layer is disposed on the insulation layer and covers the semiconductor layer. The second gate layer is disposed on the passivation layer and contacts the first gate layer through a via so that the two gate layers keep a same voltage level.

Abstract: A substrate structure including a flexible substrate, a gate line, a gate, an inorganic insulation layer, a semiconductor layer, a source, a drain, an inorganic passivation layer and an organic insulation layer is provided. The gate is electrically connected to the gate line. The inorganic insulation layer covers the gate and exposes a portion of the flexible substrate. The semiconductor layer is disposed on the inorganic insulation layer and disposed corresponding to the gate. The source and the drain extend from the inorganic insulation layer to the semiconductor layer and expose a portion of the semiconductor layer. The inorganic passivation layer covers portions of the source and the drain and directly contacts to the semiconductor layer exposed by the source and the drain. The organic insulation layer covers the source, the drain, the inorganic passivation layer and the flexible substrate exposed by the inorganic insulation layer.

Abstract: A display device includes a drive array substrate and an electrophoretic display film. The electrophoretic display film is disposed on the drive array substrate and includes a transparent material layer, a plurality of display mediums, a nano metal mesh layer, and a plurality of micro-lenses. The transparent material layer has an upper surface and a lower surface opposite to each other. The display mediums are located between the transparent material layer and the drive array substrate. The nano metal mesh layer is disposed below the lower surface of the transparent material layer and located between the transparent material layer and the display mediums. The micro-lenses are disposed above the upper surface of the transparent material layer.

Abstract: A thin film transistor structure including a substrate, a gate, an oxide semiconductor layer, a gate insulation layer, a source, a drain, a silicon-containing light absorption layer and an insulation layer is provided. The gate insulation layer is disposed between the oxide semiconductor layer and the gate. The oxide semiconductor layer and the gate are stacked in a thickness direction. The source and the drain contact the oxide semiconductor layer. A portion of the oxide semiconductor layer without contacting the source and the drain defines a channel region located between the source and the drain. The oxide semiconductor layer is located between the substrate and the silicon-containing light absorption layer. The silicon-containing light absorption layer has a band gap smaller than 2.5 eV. The insulation layer is disposed between the oxide semiconductor layer and the silicon-containing light absorption layer, and in contact with the silicon-containing light absorption layer.

Abstract: The present disclosure provides a contact window structure. In the contact window structure, a first insulating layer, having a first opening, is positioned on a first metal layer, wherein the first opening exposes a part of the first metal layer. A second metal layer covers the first opening and contacts with the first metal layer via the first opening. A second insulating layer, having a second opening, is positioned on the first insulating layer, wherein the second opening exposes a part of the second layer and the first insulating layer. The projection area of the second opening on the first metal layer covers the projection area of the first opening on the first metal layer. A pixel structure containing the contact window structure and a manufacturing method thereof are also provided herein.

Abstract: An electrophoretic display apparatus includes a driving substrate, an electrophoretic display medium layer and a color resist layer. The electrophoretic display medium layer is disposed on the driving substrate. The color resist layer is disposed on the electrophoretic display medium layer. The color resist layer includes pixel zones. The pixel zones include a first color zone, a second color zone, a third color zone, a fourth color zone and a vacant zone. The first color one and the third color zone are respectively positioned on two opposite edges of the vacant zone. The second color zone and the fourth color zone are respectively positioned on another two opposite edges of the vacant zone. The first color zone, the second color zone, the third color zone and the fourth color zone have different colors.

Abstract: An electrophoretic display apparatus includes a driving substrate, an electrophoretic display medium layer and a color resist layer. The electrophoretic display medium layer is disposed on the driving substrate. The color resist layer is disposed on the electrophoretic display medium layer. The color resist layer includes pixel zones. The pixel zones include a first color zone, a second color zone, a third color zone, a fourth color zone and a vacant zone. The first color one and the third color zone are respectively positioned on two opposite edges of the vacant zone. The second color zone and the fourth color zone are respectively positioned on another two opposite edges of the vacant zone. The first color zone, the second color zone, the third color zone and the fourth color zone have different colors.

Abstract: A semiconductor structure includes a gate, an oxide channel layer, a gate insulating layer, a source, a drain and a dielectric stacked layer. The oxide channel layer is stacked over the gate, with the gate insulting layer disposed therebetween. The source and the drain are disposed on a side of the oxide channel layer and in parallel to each other. A portion of the oxide channel layer is exposed between the source and the drain. The dielectric stacked layer is disposed on the substrate and includes plural of first inorganic dielectric layers with a first refraction index and plural of second inorganic dielectric layers with a second refraction index that are stacked alternately. At least one of the first inorganic dielectric layers directly covers the source, the drain and the portion of the oxide channel layer. The first refraction index is smaller than the second refraction index.

Abstract: A reflective display device includes a drive array substrate, an electrophoretic display film, a reflective optical film and a light source module. The electrophoretic display film is disposed on the drive array substrate and includes a plurality of display mediums. The reflective optical film is disposed on the electrophoretic display film. The light source module is disposed beside the reflective optical film. A light emitting from the light source module is reflected to the electrophoretic display film by the reflective optical film. The light source module includes a plurality of first-color light sources, a plurality of second-color light sources and a plurality of third-color light sources which are switched on in sequence. The reflective display device is in a color display mode when the light source module is turned on. The reflective display device is in a monochrome display mode when the light source module is turned off.

Abstract: A thin film transistor (TFT) structure includes a metal oxide semiconductor layer, a gate, a source, a drain, a gate insulation layer, and a passivation layer. The metal oxide semiconductor layer has a crystalline surface which is constituted by a plurality of grains separated from one another. An indium content of the grains accounts for at least 50% of all metal elements of the metal oxide semiconductor layer. The gate is disposed on one side of the metal oxide semiconductor layer. The source and the drain are disposed on the other side of the metal oxide semiconductor layer. The gate insulation layer is disposed between the gate and the metal oxide semiconductor layer. The passivation layer is disposed on the gate insulation layer, and the crystalline surface of the metal oxide semiconductor layer is in direct contact with the gate insulation layer or the passivation layer.

Abstract: A pixel structure disposed on a substrate is provided. The pixel structure includes an active device, a first electrode, a second electrode and an alignment layer. The active device is disposed on the substrate. The first electrode is disposed on the substrate and has a plurality of slits. A thickness of the first electrode is from 20 ? to 100 ?. The second electrode is disposed on the substrate and electrically independent from the first electrode. A portion of the area of the second electrode is located inside the first slits. One of the first electrode and the second electrode is electrically connected to the active device. The alignment layer covers at least the first electrode and the first slits.

Abstract: A thin film transistor structure including a substrate, a gate, an oxide semiconductor layer, a gate insulation layer, a source, a drain, a silicon-containing light absorption layer and an insulation layer is provided. The gate insulation layer is disposed between the oxide semiconductor layer and the gate. The oxide semiconductor layer and the gate are stacked in a thickness direction. The source and the drain contact the oxide semiconductor layer. A portion of the oxide semiconductor layer without contacting the source and the drain defines a channel region located between the source and the drain. The oxide semiconductor layer is located between the substrate and the silicon-containing light absorption layer. The silicon-containing light absorption layer has a band gap smaller than 2.5 eV. The insulation layer is disposed between the oxide semiconductor layer and the silicon-containing light absorption layer, and in contact with the silicon-containing light absorption layer.

Abstract: A thin film transistor (TFT) structure includes a metal oxide semiconductor layer, a gate, a source, a drain, a gate insulation layer, and a passivation layer. The metal oxide semiconductor layer has a crystalline surface which is constituted by a plurality of grains separated from one another. An indium content of the grains accounts for at least 50% of all metal elements of the metal oxide semiconductor layer. The gate is disposed on one side of the metal oxide semiconductor layer. The source and the drain are disposed on the other side of the metal oxide semiconductor layer. The gate insulation layer is disposed between the gate and the metal oxide semiconductor layer. The passivation layer is disposed on the gate insulation layer, and the crystalline surface of the metal oxide semiconductor layer is in direct contact with the gate insulation layer or the passivation layer.

Abstract: A thin film transistor (TFT) is provided, which includes a substrate, a first gate layer, an insulation layer, a first source/drain layer, a second source/drain layer, a semiconductor layer, a passivation layer and a second gate layer. The first gate layer is disposed on the substrate. The insulation layer is disposed on the first gate layer. The first source/drain layer is disposed on the insulation layer. The second source/drain layer is disposed on the insulation layer. The semiconductor layer is disposed on the insulation layer and covers the first source/drain layer and the second source/drain layer. The passivation layer is disposed on the insulation layer and covers the semiconductor layer. The second gate layer is disposed on the passivation layer and contacts the first gate layer through a via so that the two gate layers keep a same voltage level.

Abstract: A thin film transistor (TFT) structure includes a metal oxide semiconductor layer, a gate, a source, a drain, a gate insulation layer, and a passivation layer. The metal oxide semiconductor layer has a crystalline surface which is constituted by a plurality of grains separated from one another. An indium content of the grains accounts for at least 50% of all metal elements of the crystalline surface of the metal oxide semiconductor layer. The gate is disposed on one side of the metal oxide semiconductor layer. The source and the drain are disposed on the other side of the metal oxide semiconductor layer. The gate insulation layer is disposed between the gate and the metal oxide semiconductor layer. The passivation layer is disposed on the gate insulation layer, and the crystalline surface of the metal oxide semiconductor layer is in direct contact with the gate insulation layer or the passivation layer.