Abstract: A signal relaying circuit includes an input interface arranged for receiving an input signal; a DisplayPort (DP) output interface arranged for outputting a DP-like signal, where the input interface and the DP output interface correspond to different interface standards; and a relaying circuit coupled between the input interface and the DP output interface, arranged for relaying the input signal to the DP output interface according to the characteristics of channels, so as to generate the DP-like signal. A signal receiving circuit, signal relaying method and signal receiving method are also disclosed.

Abstract: A signal relaying circuit includes an input interface arranged for receiving an input signal; a DisplayPort (DP) output interface arranged for outputting a DP-like signal, where the input interface and the DP output interface correspond to different interface standards; and a relaying circuit coupled between the input interface and the DP output interface, arranged for relaying the input signal to the DP output interface according to the characteristics of channels, so as to generate the DP-like signal. A signal receiving circuit, signal relaying method and signal receiving method are also disclosed.

Abstract: The invention relates to a receiving device for an audio-video system. The receiving device comprises a connector, a video processing unit, an audio processing module, and a monitoring unit. The monitoring unit detects a status of an inputted signal received by the connector and controls the operation of at lease one of the video processing unit and the audio processing module in accordance with the detected result to avoid the audio-video system display abnormal image or play noise when the receiving device did not receive the inputted signal by accident.

Abstract: An error correction circuit and method applicable to a DisplayPort receiver is disclosed. While decoding errors occur at a decoding stage, the invention actively adjusts settings of a physical layer by using an ANSI10B/8B decoder and performs data recovery by using a correcting unit that improves the reliability of input data.

Abstract: The present invention provides an integrated circuit suitable for various packaging modes. This integrated circuit includes: a core circuit, a plurality of pads, and a selection circuit. The selection circuit is coupled between the core circuit and the pads for determining the connection state between the core circuit and the pads based on a control signal. When the control signal provides a first value, the core circuit and the pads will be in a first connection state, and the integrated circuit will be applied with a single-die package. However, when the control signal provides a second value, the core circuit and the pads will be in the second connection state, and the integrated circuit will be applied with a multi-die package.

Abstract: A timing controller for a display processing device includes: a plurality of predetermined pins for receiving an image signal by a pin-share method, wherein the image signal is a first format image signal or a second format image signal; a detector coupled to the predetermined pins and for detecting at least one of the predetermined pins to determine whether the image signal is the first format image signal or the second format image signal and outputting a detection result; and a processor coupled to the detector and for processing the image signal according to the detection result to generate and output a timing control signal.

Abstract: A device and method for controlling frame input and output are applied to the reception of image data from a source device and output of the image data to a destination device, the device includes a buffer, a buffer control circuit, and a frame write controller. The input pixel clock is not equal to the output pixel clock. The frame write controller generates a write permission signal according to the Input DE and the Output DE. The buffer control circuit generates a write control signal according to the Input DE and the write permission signal, and generates a read control signal according to the Output DE. The buffer receives the image data from the source device according to the write control signal and the input pixel clock, and outputs the image data to the destination device according to the read control signal and the output pixel clock.

Abstract: A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.

Abstract: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

Abstract: A method for reducing output rate of video data for DisplayPort sink device is disclosed. By reducing the size of a blank area in a video frame, the invention reduces a pixel rate to become compatible with more types of back-end circuits having lower processing rates.

Abstract: A receiver includes; a recovery circuit for receiving an input signal, and generating a data signal and a recovery clock; a processing circuit for processing the data signal to generate a processed signal; and a synchronization determining circuit for determining a synchronization state of the recovery clock according to the processed signal and a first reference value. The data signal includes a synchronous pattern, and the first reference value corresponds to at least a portion of a value in the synchronous pattern processed by the processing circuit. A method of the receiver is also disclosed.

Abstract: A receiving method and apparatus is disclosed. The method comprising steps of: receiving a plurality of data according to a symbol clock signal, and reading out the plurality of data according to a first clock signal and generating a water level; receiving a second clock signal so as to generate a third clock signal, and adjusting the speed of the third clock signal according to the water level; determining a sampling frequency of the plurality of data according to a data amount of the plurality of data during a unit time period or parameters of the plurality of data; and dividing the third clock signal by a dividing value or multiplying the third clock signal by a multiplying value so as to obtain the first clock signal and adjust the water level by a clock generator.

Abstract: The present invention discloses a signal receiving method for determining a transmission format of an input signal and a related signal receiving circuit. The signal receiving method includes: receiving the input signal; generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and determining the transmission format of the input signal according to the signal detecting result. The signal receiving circuit includes: an input interface, for receiving an input signal; a detecting module, for generating a signal detecting result corresponding to at least a signal transmission channel of a plurality of signal transmission channels according to an output result of the signal transmission channel; and a determining unit, for determining the transmission format of the input signal according to the signal detecting result.

Abstract: A receiving method and apparatus is disclosed. The method comprising steps of: receiving a plurality of data according to a symbol clock signal, and reading out the plurality of data according to a first clock signal and generating a water level; receiving a second clock signal so as to generate a third clock signal, and adjusting the speed of the third clock signal according to the water level; determining a sampling frequency of the plurality of data according to a data amount of the plurality of data during a unit time period or parameters of the plurality of data; and dividing the third clock signal by a dividing value or multiplying the third clock signal by a multiplying value so as to obtain the first clock signal and adjust the water level by a clock generator.

Abstract: The present invention discloses a method for determining a target type of a plurality of control signals respectively transmitted via a plurality of channels in a multi-channel system. The method includes: receiving a plurality of first control signals simultaneously from the channels during a first time period; determining a control signal priority corresponding to the first time period according to a target type determined by actual types of a plurality of second control signals respectively transmitted via the channels during a second time period, wherein the second time period is prior to the first time period; and determining the target type of the first control signals according to the control signal priority and actual types of the first control signals.

Abstract: An apparatus for processing an audio signal and method thereof applied to an audio playback system are disclosed. The apparatus comprises a decoder, an error-correcting circuit and an audio correcting module. The method for processing audio signals in accordance with the present invention decodes the audio signal to generate a decoded signal by the decoder. Then, the error-correcting circuit performs an error-correcting algorithm in the decoded signal to generate an error indication signal and an output audio signal. And the audio correcting module corrects the output audio signal to generate a corrected audio signal when the error indication signal indicates that the output audio signal has error.

Abstract: A noise processing device and its method are provided for a video/audio system having a high definition multimedia interface (HDMI). The noise processing device includes a detecting unit, a signal generating unit, and a decision unit. The noise processing method includes using the detecting unit to monitor a variation related to an audio signal and generate a detecting signal accordingly; using the signal generating unit to produce an adjustment signal according to the detecting signal; and using the decision unit to produce an output audio signal according to the audio signal and the adjustment signal. Another embodiment of the noise processing device includes a compensation tracking unit having a control unit. The compensation tracking unit produces an output audio signal according to a difference between the output audio signal itself and the audio signal and a gain of the control unit.

Abstract: A data recovery apparatus applied to a receiving device. The receiving device include an interface, an equalizer, a sampling unit, and an analyzing unit. The method of the present invention includes steps of the interface unit receiving an input signal, and the equalizer equalizing the input signal. Then the sampling unit sampling the equalized input signal. the analyzing unit analyzing and statistical calculating the sampled and equalized digital image signal, generating a statistically calculation results, and adjusting parameters of the equalizer according to the statistical calculation results. Therefore, when determining whether the parameters of the equalizer occurs the predetermined effort, changing the adjusting of parameters of the equalizer in the direction.

Abstract: The invention provides a signal receiving circuit applied to multiple digital video/audio transmission interface standards. The signal receiving circuit includes at least an input interface for receiving an input signal, and at least an interface circuit. The input interface includes a set of shared input terminals, a set of first separate input terminals for receiving an input signal corresponding to a first transmission specification with the set of shared input terminals, and a set of second separate input terminals for receiving an input signal corresponding to a second transmission specification with the set of shared input terminals. The interface circuit includes a control circuit coupled to the input interface for supplying a control signal, and a processing module coupled to the input interface and the control circuit for processing the input signal according to the control signal to generate an output signal.

Abstract: A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.