Abstract: Corruption of data in a FRAM (2) is avoided by applying a regulated voltage (VLDO) to a conductive pin (5-1). A switch (SW1) is coupled between the conductive pin and a power terminal of the FRAM so a FRAM supply voltage (VFRAM) is equal to the regulated voltage when the switch is closed. The conductive pin is coupled to a power terminal of a digital circuit (3) so a digital circuit supply voltage (VCORE) is equal to the regulated voltage. A power interruption is detected to produce an interruption signal (nBORdet) that opens the switch and also prevents starting of new read and write operations in the FRAM. A sufficient FRAM supply voltage is maintained by an internal capacitor (CINT) while ongoing read and write operations in the FRAM are completed during a predetermined interval. The conductive pin may be coupled to the switch by bonding wire inductance (LWIRE) between the switch and the conductive pin to inhibit flow of transient currents between them.

Abstract: Corruption of data in a FRAM (2) is avoided by applying a regulated voltage (VLDO) to a conductive pin (5-1). A switch (SW1) is coupled between the conductive pin and a power terminal of the FRAM so a FRAM supply voltage (VFRAM) is equal to the regulated voltage when the switch is closed. The conductive pin is coupled to a power terminal of a digital circuit (3) so a digital circuit supply voltage (VCORE) is equal to the regulated voltage. A power interruption is detected to produce an interruption signal (nBORdet) that opens the switch and also prevents starting of new read and write operations in the FRAM. A sufficient FRAM supply voltage is maintained by an internal capacitor (CINT) while ongoing read and write operations in the FRAM are completed during a predetermined interval. The conductive pin may be coupled to the switch by bonding wire inductance (LWIRE) between the switch and the conductive pin to inhibit flow of transient currents between them.