Patents by Inventor Udaya Kiran Ammu

Udaya Kiran Ammu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10386907
    Abstract: A computing device is associated with a circuit for sharing and distributing backup power. During normal operating conditions, a main bus bar provides power to each computing device in a rack via a main power bus of the corresponding circuit. In the event of an AC power outage, the main power bus is deactivated and a backup power path of the circuit is activated. Backup power is provided to the device from a battery of the circuit via the backup power path. A shared power path is also activated in the circuit such that backup power may be provided from the battery to the main bus bar. By providing backup power to the main bus bar, the other computing devices in the rack that do not have sufficient backup power may receive backup power from the main bus bar until AC power is restored.
    Type: Grant
    Filed: September 28, 2017
    Date of Patent: August 20, 2019
    Assignee: Google LLC
    Inventors: Udaya Kiran Ammu, Tracy Jane Van Dyk, Cornelius O'Sullivan, Srikanth Lakshmikanthan
  • Publication number: 20180018008
    Abstract: A computing device is associated with a circuit for sharing and distributing backup power. During normal operating conditions, a main bus bar provides power to each computing device in a rack via a main power bus of the corresponding circuit. In the event of an AC power outage, the main power bus is deactivated and a backup power path of the circuit is activated. Backup power is provided to the device from a battery of the circuit via the backup power path. A shared power path is also activated in the circuit such that backup power may be provided from the battery to the main bus bar. By providing backup power to the main bus bar, the other computing devices in the rack that do not have sufficient backup power may receive backup power from the main bus bar until AC power is restored.
    Type: Application
    Filed: September 28, 2017
    Publication date: January 18, 2018
    Inventors: Udaya Kiran Ammu, Tracy Jane Van Dyk, Cornelius O'Sullivan, Srikanth Lakshmikanthan
  • Patent number: 9804654
    Abstract: A computing device is associated with a circuit for sharing and distributing backup power. During normal operating conditions, a main bus bar provides power to each computing device in a rack via a main power bus of the corresponding circuit. In the event of an AC power outage, the main power bus is deactivated and a backup power path of the circuit is activated. Backup power is provided to the device from a battery of the circuit via the backup power path. A shared power path is also activated in the circuit such that backup power may be provided from the battery to the main bus bar. By providing backup power to the main bus bar, the other computing devices in the rack that do not have sufficient backup power may receive backup power from the main bus bar until AC power is restored.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: October 31, 2017
    Assignee: Google Inc.
    Inventors: Udaya Kiran Ammu, Tracy Van Dyk, Cornelius O'Sullivan, Srikanth Lakshmikanthan
  • Patent number: 9151817
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: October 6, 2015
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 8451153
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: May 28, 2013
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 7986254
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: May 25, 2010
    Date of Patent: July 26, 2011
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu
  • Patent number: 7741983
    Abstract: The present invention pertains to calibration in current sensing applications. Power conversion systems such as those used in computer architectures may employ step down converters such as buck converters or other types of converters. The present invention provides calibration processes and devices to account for various parasitic resistances which are found in such systems. A calibration circuit may be coupled to the buck converter or other power conversion to determine a calibrated voltage signal for the output of the power converter. An effective DC resistance may be determined and programmed for use by a control device used. In this way, the parasitic resistances are taken into account to obtain an accurate estimate of the actual current. In turn, this enables power converters and other devices to operate within specification requirements.
    Type: Grant
    Filed: December 5, 2008
    Date of Patent: June 22, 2010
    Assignee: Google Inc.
    Inventors: Srikanth Lakshmikanthan, Eduardo M. Lipiansky, Udaya Kiran Ammu