Patents by Inventor Udayan Dasgupta
Udayan Dasgupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220304575Abstract: The invention provides a system and method for a mobile-powered desktop ECG system configured for remote monitoring of a patient. Analog ECG waveforms from probes attached to a patient are shared with a base ECG unit. The received analog ECG waveforms are converted into digital ECG waveforms and shared with a smartphone that powers the base ECG unit. The digital ECG waveforms are processed in the smartphone through an ECG application and sent to a cloud. The ECG application enables the smartphone connect with a medical practitioner in case a medical emergency is detected.Type: ApplicationFiled: August 27, 2020Publication date: September 29, 2022Inventors: Zainul Charbiwala, Vamshi Krishna, Hamad Mohsin Jowher, Charit Bhograj, Udayan Dasgupta, Abhinav Gujjar, Achuth Pv, Ajay Singh Dahiya, Shekhar Kumar Gupta, Yureka Rajendran
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Publication number: 20220208320Abstract: A system and method for displaying physiological information is disclosed. The system includes a server to receive a first compressed data file associated with a physiological parameter of a person, decompress the first compressed data file, and analyze the decompressed data file to generate or derive a set of information associated with the person, and a client device to receive the first compressed data file, and communicate with the server to receive the set of information for display on a user interface. The server compresses the set of information to generate a second compressed data file, and sends the second compressed data file to the client device. The client device decompresses the received second compressed data and a part of the first compressed data file, and displays at least a part of the decompressed data on the user interface.Type: ApplicationFiled: April 15, 2020Publication date: June 30, 2022Inventors: Charit Bhograj, Udayan Dasgupta, Abhinav Gujjar, Manmay Nakhashi, Suresh Velusamy, Achuth Pv, Tharun Kumar, Zainul Charbiwala
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Publication number: 20220199207Abstract: A system and method for facilitating data processing of physiological information is disclosed. The system for facilitating data processing of physiological information includes: a device operable to collect a dataset of the physiological information from a person; and a server operable to receive the dataset from the device, and classify the dataset into at least one preliminary group of medical condition. The server is arranged in data communication to send the preliminary group to a third party device for verification. The server is operable to receive a verified group from the third party device, and modify at least a part of algorithm associated with the classification based on the verified group.Type: ApplicationFiled: April 15, 2020Publication date: June 23, 2022Inventors: Charit Charit, Zainul Charbiwala, Udayan Dasgupta, Abhinav Gujjar
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Publication number: 20220175322Abstract: The disclosed invention provides a system and method for adaptive interference suppression for a signal in general and an ECG signal in particular. The method includes acquisition of a signal through an acquisition process. The signal is further passed through an FFT module configured to perform time windowing and FFT operation on the signal. The method further includes setting one or more fixed or adaptive thresholds for detecting tonal interferers in the signal. The method further includes choosing an appropriate filter for filtering the detected tonal interferers in the signal. Further, the detected tonal interferers are removed using the chosen appropriate filter. Finally, the method includes removing padding from the signal to eliminate residual edge effects.Type: ApplicationFiled: March 20, 2020Publication date: June 9, 2022Inventors: Udayan Dasgupta, Achuth Pv
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Patent number: 10534083Abstract: Systems and methods for color Doppler imaging in an ultrasound imaging system are disclosed herein. An ultrasound imaging system includes color Doppler imaging circuitry. The color Doppler imaging circuitry is configured to estimate flow parameters. The imaging circuitry includes a radio frequency (“RF”) demodulator configured to produce in-phase and quadrature components of an ultra-sound data vector. The RF demodulator includes a table in memory that stores interleaved sine and cosine values. The RF demodulator maintains an index value for the table having higher precision than is used to index the table. The RF demodulator rounds the index value for each access of the table. Each table access retrieves a sine value and a cosine value.Type: GrantFiled: March 14, 2017Date of Patent: January 14, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, David P. Magee, Murtaza Ali
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Publication number: 20170184720Abstract: Systems and methods for color Doppler imaging in an ultrasound imaging system are disclosed herein. An ultrasound imaging system includes color Doppler imaging circuitry. The color Doppler imaging circuitry is configured to estimate flow parameters. The imaging circuitry includes a radio frequency (“RF”) demodulator configured to produce in-phase and quadrature components of an ultra-sound data vector. The RF demodulator includes a table in memory that stores interleaved sine and cosine values. The RF demodulator maintains an index value for the table having higher precision than is used to index the table. The RF demodulator rounds the index value for each access of the table. Each table access retrieves a sine value and a cosine value.Type: ApplicationFiled: March 14, 2017Publication date: June 29, 2017Inventors: Udayan Dasgupta, David P. Magee, Murtaza Ali
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Patent number: 9506882Abstract: A system for processing real-time fluoroscopy image sequences. A first image frame is loaded into an upper level memory of a hierarchical memory system that is coupled to at least one processing core. The first image frame is processed with an object detection filter to form a likelihood image frame. The first image frame and the likelihood image frame is spatially filtered using a spatial filter look up table (LUT) stored in an L1 level memory of the processing core. The likelihood image frame is temporally filtering using a temporal filter LUT stored in the L1 level memory.Type: GrantFiled: January 18, 2012Date of Patent: November 29, 2016Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Murtaza Ali
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Publication number: 20160066890Abstract: Methods for color Doppler imaging in an ultrasound imaging system are disclosed herein. Ultrasound radio frequency RF data is demodulated using a nested processing loop including an inner loop and an outer loop. A plurality of Wall filter coefficients are fetched from ultrasound imaging system memory in a single memory access cycle. The plurality Wall filter coefficients are applied to a plurality of complex ultrasound data values in a single execution cycle. The Wall filtered ultrasound data are provided to a flow estimator.Type: ApplicationFiled: November 18, 2015Publication date: March 10, 2016Inventors: Udayan Dasgupta, David P. Magee, Murtaza Ali
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Patent number: 9184761Abstract: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes of the line segments between the three points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: GrantFiled: February 28, 2014Date of Patent: November 10, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Abhijit A. Patki, Ganesan Thiagarajan, Udayan Dasgupta
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Patent number: 9100035Abstract: A snapout calculator, and wherein the snapout calculator determines where the reference levels for the various comparators shall be placed after each asynchronous sample is generated.Type: GrantFiled: February 28, 2014Date of Patent: August 4, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Abhijit A. Patki, Ganesan Thiagarajan, Janakiraman S, Madhulatha Bonu, Venugopal Gopinathan
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Patent number: 9077360Abstract: An apparatus, comprising: an analog to digital converter including: a clipping detector; and a post-processor, wherein the post processor generates synchronous values of clipped data based on non-clipped values of non-clipped data.Type: GrantFiled: February 28, 2014Date of Patent: July 7, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Ganesan Thiagarajan, Venugopal Gopinathan
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Patent number: 9077359Abstract: A method, comprising: selecting two Two-Tuples before and two after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time differences between each of the asynchronous samples surrounding the selected sample, and the three linear slopes of the line segments between the two points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: GrantFiled: February 28, 2014Date of Patent: July 7, 2015Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Ganesan Thiagarajan, Udayan Dasgupta, Abhijit A. Patki
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Patent number: 9015452Abstract: A digital signal processor (DSP) includes an instruction fetch unit, an instruction decode unit, a register set and a plurality of work units in communication with the instruction decode unit. A first embodiment calculates two divisions on packed numerators and packed denominators. The DSP work units calculate indexes into a 1/d look-up table and make a final sign correction. A second embodiment calculates an approximation of a vector magnitude of a complex number x+jy. The approximation is based upon ?(x2+y2)??*max(|x|, |y|)+?*min(|x|, |y|). The DSP work units calculate the absolute values, find the maxima and minima, and form the packed results of two vector magnitude calculations.Type: GrantFiled: February 18, 2010Date of Patent: April 21, 2015Assignee: Texas Instruments IncorporatedInventor: Udayan Dasgupta
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Patent number: 8988266Abstract: A method, comprising: receiving an analog input; determining an upper outer rail and a lower outer rail as polling values to be used by voltage comparators; blanking at least three comparators; determining which two of the at least three comparators are closest to the input analog voltage levels; defining the two comparators which are closest to the analog input signal to be the next comparators of the next sampling process; assigning a remaining comparator at a voltage level in between the new top and bottom voltage levels; enabling the outer rails, but blanking the inner rail; progressively narrowing down the voltage range spanned by the two outer comparators; and generating a 2-tuple value of an asynchronous voltage comparator crossing.Type: GrantFiled: February 28, 2014Date of Patent: March 24, 2015Assignee: Texas Instruments IncorporatedInventors: Janakiraman S, Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
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Patent number: 8981984Abstract: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c?1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s?11”, “s01”, “s00” and “s?10” based on particular values of the windowed sinc. function; and using c0, c?1, s?11, s01, s00 and s?10, the high precision synchronous output of interest, z0 is generated.Type: GrantFiled: February 28, 2014Date of Patent: March 17, 2015Assignee: Texas Instruments IncorporatedInventors: Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki
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Patent number: 8830106Abstract: A method is provided. An analog signal is received. The analog input signal is compared to first and second reference signals to generate a first comparison result, and the first comparison result and a first time stamp corresponding to the first comparison result are registered. A first portion of a digital signal is generated from the first comparison result. At least one of the first and second reference signals is adjusted. A second comparison result is generated if the analog signal reaches an adjusted one of the first and second reference signals within a predetermined interval, and a second portion of the digital signal is generated from the second comparison result.Type: GrantFiled: August 30, 2012Date of Patent: September 9, 2014Assignee: Texas Instruments IncorporatedInventors: Udayan Dasgupta, Ganesan Thiagarajan, Venugopal Gopinathan
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Publication number: 20140247173Abstract: A method, comprising: selecting three Two-Tuples before and three after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time difference between the asynchronous samples surrounding the selected sample, and the five linear slopes of the line segments between the three points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Abhijit A. Patki, Ganesan Thiagarajan, Udayan Dasgupta
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Publication number: 20140247174Abstract: A method, comprising: selecting two Two-Tuples before and two after a selected synchronous ADC conversion point; calculating the coefficients of a third order polynomial based on the value of the previous time asynchronous sample, the time differences between each of the asynchronous samples surrounding the selected sample, and the three linear slopes of the line segments between the two points before and the points after the selected synchronous sample point, including the slope of the selected point; evaluating the third order polynomial at the synchronous time instant; generating the synchronous ADC value based on this calculation; and using the ADC value as the desired voltage level of the synchronous sample, wherein the synchronous ADC value is generated based on this calculation.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Ganesan Thiagarajan, Udayan Dasgupta, Venugopal Gopinathan
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Publication number: 20140247175Abstract: A method, comprising: receiving a plurality of 2-tuples of asynchronously sampled inputs at an asynchronous to synchronous reconstructor; performing a coarse asynchronous to synchronous conversion using the plurality of 2-tuples to generate a plurality of low precision synchronous outputs; generating a high precision synchronous output, z0, using a plurality of asynchronous 2-tuples, low precision synchronous outputs after it, and its own high precision outputs from previous steps; calculating c0 and c?1 by summing future low precision outputs and the past high precision outputs after they are weighted with the appropriate windowed sinc. values and then subtracted from appropriate asynchronous samples; calculating, the four quantities “s?11”, “s01”, “s00” and “s?10” based on particular values of the windowed sinc. function; and using c0, c?1, s?11, s01, s00 and s?10, the high precision synchronous output of interest, z0 is generated.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Udayan Dasgupta, Janakiraman S, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan
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Publication number: 20140247176Abstract: An apparatus, comprising: an analog to digital converter including: a clipping detector; and a post-processor, wherein the post processor generates synchronous values of clipped data based on non-clipped values of non-clipped data.Type: ApplicationFiled: February 28, 2014Publication date: September 4, 2014Inventors: Janakiraman S, Udayan Dasgupta, Ganesan Thiagarajan, Abhijit A. Patki, Madhulatha Bonu, Venugopal Gopinathan