Patents by Inventor UDAYAN KAPALEY

UDAYAN KAPALEY has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12117886
    Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 15, 2023
    Date of Patent: October 15, 2024
    Assignee: Intel Corporation
    Inventors: Jianfang Zhu, Deepak Samuel Kirubakaran, Raoul Rivas Toledano, Chee Lim Nge, Rajshree Chabukswar, James Hermerding, II, Sudheer Nair, William Braun, Zhongsheng Wang, Russell Fenger, Udayan Kapaley
  • Publication number: 20240111654
    Abstract: Detailed herein are examples of hybrid (heterogenous) performance monitoring unit enumeration. In some examples, a processor supports an instruction that enumerates performance monitoring unit enumeration. For example, the processor comprises decoder circuitry to decode an instance of a single instruction, the single instruction to include a field for an opcode; and execution circuitry to execute the decoded instruction according to the opcode to return the processor identification and feature information including an enumeration of heterogenous performance monitoring unit capabilities.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Inventors: Raoul Rivas Toledano, Udayan Kapaley, Ahmad Yasin, Karthik Gopalakrishnan, Marc Torrant
  • Publication number: 20240045490
    Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.
    Type: Application
    Filed: August 15, 2023
    Publication date: February 8, 2024
    Inventors: Jianfang Zhu, Deepak Samuel Kirubakaran, Raoul Rivas Toledano, Chee Lim Nge, Rajshree Chabukswar, James Hermerding, II, Sudheer Nair, William Braun, Zhongsheng Wang, Russell Fenger, Udayan Kapaley
  • Patent number: 11775047
    Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: August 2, 2022
    Date of Patent: October 3, 2023
    Assignee: Intel Corporation
    Inventors: Jianfang Zhu, Deepak Samuel Kirubakaran, Raoul Rivas Toledano, Chee Lim Nge, Rajshree Chabukswar, James Hermerding, II, Sudheer Nair, William Braun, Zhongsheng Wang, Russell Fenger, Udayan Kapaley
  • Publication number: 20220374066
    Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.
    Type: Application
    Filed: August 2, 2022
    Publication date: November 24, 2022
    Inventors: JIANFANG ZHU, Deepak Samuel Kirubakaran, Raoul Rivas Toledano, Chee Lim Nge, Rajshree Chabukswar, James Hermerding, II, Sudheer Nair, William Braun, Zhongsheng Wang, Russell Fenger, Udayan Kapaley
  • Patent number: 11422616
    Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: August 23, 2022
    Assignee: Intel Corporation
    Inventors: Jianfang Zhu, Deepak Samuel Kirubakaran, Raoul Rivas Toledano, Chee Lim Nge, Rajshree Chabukswar, James Hermerding, II, Sudheer Nair, William Braun, Zhongsheng Wang, Russell Fenger, Udayan Kapaley
  • Publication number: 20210303054
    Abstract: In one embodiment, a processor includes: at least one core; and a power controller coupled to the at least one core. The power controller may include: a workload monitor circuit to calculate a background task ratio based on a first amount of time that the at least one core executed background tasks during an active duration; and a control circuit to dynamically apply a power management policy for a background mode when the background task ratio exceeds a background mode threshold, the power management policy for the background mode to reduce power consumption of the processor. Other embodiments are described and claimed.
    Type: Application
    Filed: March 26, 2020
    Publication date: September 30, 2021
    Inventors: JIANFANG ZHU, DEEPAK SAMUEL KIRUBAKARAN, RAOUL RIVAS TOLEDANO, CHEE LIM NGE, RAJSHREE CHABUKSWAR, JAMES HERMERDING, II, SUDHEER NAIR, WILLIAM BRAUN, ZHONGSHENG WANG, RUSSELL FENGER, UDAYAN KAPALEY