Patents by Inventor Udy A. Shrivastava

Udy A. Shrivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7154175
    Abstract: An integrated circuit package includes a first chip and a folded flexible substrate. The flexible substrate has a first surface and an opposing second surface and is disposed to partially surround the first chip. A first routing layer is formed on the first surface of the flexible substrate and a second routing layer is formed on the second surface of the flexible substrate. A metal ground plane is formed on a selected one of the first and the second surfaces.
    Type: Grant
    Filed: June 21, 2004
    Date of Patent: December 26, 2006
    Assignee: Intel Corporation
    Inventors: Udy A. Shrivastava, Kristopher Frutschy
  • Patent number: 7081800
    Abstract: According to embodiments of the present invention, a balun is disposed on a package that is to receive a die. In embodiments, the balun includes a first metal trace disposed on a first base and a second metal trace disposed on a second base. In embodiments, the first metal trace is one-quarter wavelength of an operating wavelength for a radio frequency (RF) signal and the second metal trace is three-quarters wavelength of the wavelength.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: July 25, 2006
    Assignee: Intel Corporation
    Inventors: Jianggi He, Udy Shrivastava, Chee Hoo Lee
  • Publication number: 20060001501
    Abstract: According to embodiments of the present invention, a balun is disposed on a package that is to receive a die. In embodiments, the balun includes a first metal trace disposed on a first base and a second metal trace disposed on a second base. In embodiments, the first metal trace is one-quarter wavelength of an operating wavelength for a radio frequency (RF) signal and the second metal trace is three-quarters wavelength of the wavelength.
    Type: Application
    Filed: June 30, 2004
    Publication date: January 5, 2006
    Inventors: Jiangqi He, Udy Shrivastava, Chee Lee
  • Publication number: 20050280138
    Abstract: An integrated circuit package includes a first chip and a folded flexible substrate. The flexible substrate has a first surface and an opposing second surface and is disposed to partially surround the first chip. A first routing layer is formed on the first surface of the flexible substrate and a second routing layer is formed on the second surface of the flexible substrate. A metal ground plane is formed on a selected one of the first and the second surfaces.
    Type: Application
    Filed: June 21, 2004
    Publication date: December 22, 2005
    Inventors: Udy Shrivastava, Kristopher Frutschy
  • Patent number: 5483099
    Abstract: An integrated circuit package that is coupled to a printed circuit board by a socket assembly. The socket assembly has a plurality of pins that are mounted to the circuit board. The pins are coupled to corresponding conductive sockets and outer rings of the socket assembly. The package contains an integrated circuit that is coupled to external pins which extend from a bottom surface of the package housing. The package also has a plurality of conductive rings that are located on the bottom surface of the housing and are electrically coupled to the integrated circuit. To install the package, the package pins are inserted into the individual sockets of the socket assembly. Insertion of the pins also presses the conductive rings of the package onto the corresponding outer rings of the socket. The conductive rings are typically dedicated to the power and ground pins of the system, wherein the integrated circuit receives power through the rings.
    Type: Grant
    Filed: August 31, 1994
    Date of Patent: January 9, 1996
    Assignee: Intel Corporation
    Inventors: Siva Natarajan, Udy Shrivastava, William M. Siu, Mark J. Palmer