Patents by Inventor UJWAL PATEL

UJWAL PATEL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11944759
    Abstract: In some examples a catheter includes an inner liner, an outer jacket, and a structural support member positioned between at least a portion of the inner liner and at least a portion of the outer jacket. A first portion of the structural support member has a first residual stress and a second portion of the structural support member has a second residual stress, greater than the first residual stress. The second portion of the structural support member includes a percent cold work greater than about 20%.
    Type: Grant
    Filed: May 5, 2021
    Date of Patent: April 2, 2024
    Assignee: Covidien LP
    Inventors: Syamala Rani Pulugurtha, Gopan Patel, Ujwal Jalgaonkar
  • Patent number: 10509588
    Abstract: Systems, methods, and computer programs are disclosed for controlling memory frequency. One method comprises a first memory client generating a compressed data buffer and compression statistics related to the compressed data buffer. The compressed data buffer and the compression statistics are stored in a memory device. Based on the stored compression statistics, a frequency or voltage setting of the memory device is adjusted for enabling a second memory client to read the compressed data buffer.
    Type: Grant
    Filed: January 13, 2016
    Date of Patent: December 17, 2019
    Assignee: Qualcomm Incorporated
    Inventors: Serag Gadelrab, Sudeep Ravi Kottilingal, Meghal Varia, Pooja Sinha, Ujwal Patel, Ruo Long Liu, Jeffrey Chu, Sina Gholamian, Hyukjune Chung, David Strasser, Raghavendra Nagaraj, Eric Demers
  • Patent number: 10014693
    Abstract: The disclosure relates to a system including a set of subsystems sharing a voltage rail. The system includes a power controller configured to send messages, such as interrupts, to the subsystems concerning a change of state of a supply voltage on the voltage rail. Such messages may have been sent in response to requests and messages from the subsystems, respectively. In response to the messages, the subsystems may send requests to the power controller for different dynamic clock voltage scaling (DCVS) levels, respectively. In response to such requests, the power controller may set the supply voltage and frequencies of clock signals for the requesting subsystems, respectively.
    Type: Grant
    Filed: May 23, 2016
    Date of Patent: July 3, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Dileep Marchya, Dhaval Kanubhai Patel, Ujwal Patel, Nagamalleswararao Ganji, Mastan Manoj Kumar Amara Venkata, Panneer Arumugam
  • Publication number: 20170338661
    Abstract: The disclosure relates to a system including a set of subsystems sharing a voltage rail. The system includes a power controller configured to send messages, such as interrupts, to the subsystems concerning a change of state of a supply voltage on the voltage rail. Such messages may have been sent in response to requests and messages from the subsystems, respectively. In response to the messages, the subsystems may send requests to the power controller for different dynamic clock voltage scaling (DCVS) levels, respectively. In response to such requests, the power controller may set the supply voltage and frequencies of clock signals for the requesting subsystems, respectively.
    Type: Application
    Filed: May 23, 2016
    Publication date: November 23, 2017
    Inventors: Dileep Marchya, Dhaval Kanubhai Patel, Ujwal Patel, Nagamalleswararao Ganji, Mastan Manoj Kumar Amara Venkata, Panneer Arumugam
  • Publication number: 20170083262
    Abstract: Systems, methods, and computer programs are disclosed for controlling memory frequency. One method comprises a first memory client generating a compressed data buffer and compression statistics related to the compressed data buffer. The compressed data buffer and the compression statistics are stored in a memory device. Based on the stored compression statistics, a frequency or voltage setting of the memory device is adjusted for enabling a second memory client to read the compressed data buffer.
    Type: Application
    Filed: January 13, 2016
    Publication date: March 23, 2017
    Inventors: SERAG GADELRAB, SUDEEP RAVI KOTTILINGAL, MEGHAL VARIA, POOJA SINHA, UJWAL PATEL, RUOLONG LIU, JEFFREY CHU, SINA GHOLAMIAN, HYUKJUNE CHUNG, DAVID STRASSER, RAGHAVENDRA NAGARAJ, ERIC DEMERS