Patents by Inventor Uk-Rae Chio

Uk-Rae Chio has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Memory architecture permitting selection of storage density after fabrication of active circuitry
    Publication number: 20020136046
    Abstract: A generic wafer includes memory units separated by scribe lanes. Memory chips of different storage capacities can be produced from different numbers of memory units on the generic wafer by forming one or more interconnect layer specialized according to a desired storage capacity and cutting the wafer using a sawing pattern according to the desired storage capacity.
    Type: Application
    Filed: March 21, 2001
    Publication date: September 26, 2002
    Inventors: Su-Chui Kim, Hyun-Geun Byun, Kwang-Jin Lee, Jong-Cheol Lee, Uk-Rae Chio