Abstract: A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.

Abstract: An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad.

Abstract: A packaged semiconductor device includes a first bond pad, a second bond pad, a first bond wire that includes a first end bonded to the first bond pad and a second end bonded to the second bond pad, and a second bond wire that includes a first end that is electrically connected to the first bond pad and a second end that is electrically connected to the second bond pad. The first end of the second bond wire is bonded to the first end of the first bond wire. A method of bonding a bond wire includes bonding a first end of a first bond wire to a contact surface of a first bond pad and bonding a first end of a second bond wire to a surface of the first end of the first bond wire.

Abstract: An RF transistor package includes a metal submount; a transistor die mounted to the metal submount; and a surface mount IPD component mounted to the metal submount. The surface mount IPD component includes a dielectric substrate that includes a top surface and a bottom surface and at least a first pad and a second pad arranged on a top surface of the surface mount IPD component; at least one surface mount device includes a first terminal and a second terminal, the first terminal of the surface mount device mounted to the first pad and the second terminal mounted to the second pad; at least one of the first terminal and the second terminal being configured to be isolated from the metal submount by the dielectric substrate; and at least one wire bond bonded to the at least one of the first pad and the second pad.

Abstract: A packaged transistor amplifier includes a package having an input lead and an output lead; a transistor stage having a plurality of unit cell transistors that are electrically coupled to the input lead in parallel, each of the unit cell transistors having an output; a first output bond pad that is coupled to a first subset of the outputs of the unit cell transistors by a first feed network; a second output bond pad that is separate from the first output bond pad, the second output bond pad coupled to a second subset of the outputs of the unit cell transistors by a second feed network; a first output bond wire coupled between the first output bond pad and the output lead; and a second output bond wire coupled between the second output bond pad and the output lead. Related design methods are also provided.

Abstract: A packaged transistor amplifier includes a package having an input lead and an output lead; a transistor stage having a plurality of unit cell transistors that are electrically coupled to the input lead in parallel, each of the unit cell transistors having an output; a first output bond pad that is coupled to a first subset of the outputs of the unit cell transistors by a first feed network; a second output bond pad that is separate from the first output bond pad, the second output bond pad coupled to a second subset of the outputs of the unit cell transistors by a second feed network; a first output bond wire coupled between the first output bond pad and the output lead; and a second output bond wire coupled between the second output bond pad and the output lead. Related design methods are also provided.