Abstract: A semiconductor based integrated sensor device includes: a lateral insulating-gate field effect transistor (MOSFET) connected in series to the base of a vertical bipolar junction transistor (BJT) wherein the drain-drift-region of the MOSFET is part of the base-region of the BJT within the semiconductor substrate thus making electrical contact to the base of the BJT and the distance of the drain-drift-region of the MOSFET to the emitter of the BJT exceeds the vertical distance between the emitter and any buried layer, serving as collector, and the breakdown voltage of the device being determined by the BVCEO of the vertical BJT.

Abstract: An LDMOS transistor device in an integrated circuit comprises a semiconductor substrate (10), a gate region (1) including a gate semiconductor layer region (2; 2?; 151) on top of a gate insulation layer region (3; 141), source (4) and drain (5, 7) regions, and a channel (6; 12) arranged beneath the LDMOS gate region, the channel interconnecting the LDMOS source and drain regions and having a laterally graded doping concentration. In order to obtain a lower parasitic capacitance coupling from the gate semiconductor region, the gate semiconductor layer region is provided with a laterally graded net doping concentration (P+N+; N+N?). A method for fabrication of the inventive LDMOS transistor device is further disclosed.

Abstract: A hybrid wafer comprises a single-crystal SixGe1-x layer (15), where 0?x?1, a high thermal conductivity layer (10), and between the single-crystal SixGe1-x layer (15) and the high thermal conductivity layer (10), an intermediate layer (21) having a thickness of between 1 nanometer and 1 micrometer and comprising at least one amorphous or polycrystalline SixGe1-x layer (21a), where 0?x?1.

Abstract: An LDMOS transistor device in an integrated circuit comprises a semiconductor substrate (10), a gate region (1) including a gate semiconductor layer region (2; 2?; 151) on top of a gate insulation layer region (3; 141), source (4) and drain (5, 7) regions, and a channel (6; 12) arranged beneath the LDMOS gate region, the channel interconnecting the LDMOS source and drain regions and having a laterally graded doping concentration. In order to obtain a lower parasitic capacitance coupling from the gate semiconductor region, the gate semiconductor layer region is provided with a laterally graded net doping concentration (P+N+; N+N?). A method for fabrication of the inventive LDMOS transistor device is further disclosed.

Abstract: An integrated LDMOS transistor comprises a semiconductor substrate (11), an LDMOS gate region (17), LDMOS source (14) and drain (15) regions, and a channel region (13) arranged beneath the LDMOS gate region, where the channel region interconnects the LDMOS source and drain regions. The LDMOS gate region comprises first (18a) and second (18b) gate insulation layer regions, a centrally located gate-dividing insulation region (19) provided between the first and second gate insulation layer regions, and first (20a) and second (20b) individual gate conducting layer regions, each being provided on top of a respective one of the first and second gate insulation layer regions, and each being an etched outside spacer region at the centrally located insulation layer region.

Abstract: An LDMOS transistor device in an integrated circuit comprises a semiconductor substrate (10), a gate region (1) including a gate semiconductor layer region (2; 2?; 151) on top of a gate insulation layer region (3; 141), source (4) and drain (5, 7) regions, and a channel (6; 12) arranged beneath the LDMOS gate region, the channel interconnecting the LDMOS source and drain regions and having a laterally graded doping concentration. In order to obtain a lower parasitic capacitance coupling from the gate semiconductor region, the gate semiconductor layer region is provided with a laterally graded net doping concentration (P+N+; N+N?). A method for fabrication of the inventive LDMOS transistor device is further disclosed.

Abstract: The present invention relates to the use of oligonucleotides antisense to part of the resistin gene and siRNA blocking the action of resistin for the treatment of Rheumatoid Arthritis. The present invention also relates to the determination of the onset of rheumatoid arthritis.

Abstract: An integrated LDMOS transistor comprises a semiconductor substrate (11), an LDMOS gate region (17), LDMOS source (14) and drain (15) regions, and a channel region (13) arranged beneath the LDMOS gate region, where the channel region interconnects the LDMOS source and drain regions. The LDMOS gate region comprises first (18a) and second (18b) gate insulation layer regions, a centrally located gate-dividing insulation region (19) provided between the first and second gate insulation layer regions, and first (20a) and second (20b) individual gate conducting layer regions, each being provided on top of a respective one of the first and second gate insulation layer regions, and each being an etched outside spacer region at the centrally located insulation layer region.

Abstract: The nutritional deficiencies which constitute a serious side-effect of intestinal cleansing procedures can be alleviated or entirely avoided by a composition and method according to the present invention, wherein a complex carbohydrate is administered to the patient in a form and an amount which gives a blood glucose response similar to that following a normal meal, and stabilizes the blood glucose level above 3.5 mmol/l, preferably above about 4 mmol/l, thus preventing hypoglycaemia. The composition and method is suitable for all patients, but in particular for weakened, elderly or diabetic patients. The composition and method significantly improves the well-being of the patients, and does not reduce the cleansing effect achieved by conventional intestinal cleansing preparations or procedures, and has no known side effects. The preferred complex carbohydrate is native corn starch, and the composition may also include a simple carbohydrate, e.g. sucrose.

Abstract: An LDMOS transistor device in an integrated circuit comprises a semiconductor substrate (10), a gate region (1) including a gate semiconductor layer region (2; 2?; 151) on top of a gate insulation layer region (3; 141), source (4) and drain (5, 7) regions, and a channel (6; 12) arranged beneath the LDMOS gate region, the channel interconnecting the LDMOS source and drain regions and having a laterally graded doping concentration. In order to obtain a lower parasitic capacitance coupling from the gate semiconductor region, the gate semiconductor layer region is provided with a laterally graded net doping concentration (P+N+; N+N?). A method for fabrication of the inventive LDMOS transistor device is further disclosed.

Abstract: Novel non-coding sequences isolated upstream of the human IRS-2 gene are disclosed as markers for the prediction and/or diagnosis of IRS-2 related metabolic disorders or diseases, such as diabetes. The sequences also fuction as markers in a method and assay for evaluating the insulin regulating, i.e. insulin sensitizing or inhibiting properties of drug candidate substances, e.g. a method and assay for high throughput screening. The sequences and/or information derived therefrom can also be used for influencing the expression of the IRS-2 gene, e.g. in the therapy of IRS-2 related metabolic disorders, such as diabetes.

Abstract: On a semiconductor die, a conductive layer is formed by first attaching a semiconductor wafer to a support wafer, then cutting the semiconductor wafer into dies, and finally depositing a conductive layer on the sides of the dies. The conductive layer is preferably a metal layer, which extends into the support wafer, which ensures that, when the support wafer is removed, the conductive layer extends all the way over the sidewall of the semiconductor die. The method allows the simultaneous application of the conductive layer to many dies. The conductive layer reduces the resistance for currents in the radio frequency range flowing close to the edges of the die due to the skin effect.

Abstract: Novel non-coding sequences isolated upstream of the human IRS-2 gene are disclosed as markers for the prediction and/or diagnosis of IRS-2 related metabolic disorders or diseases, such as diabetes. The sequences also fiction as markers in a method and assay for evaluating the insulin regulating, i.e. insulin sensitizing or inhibiting properties of drug candidate substances, e.g. a method and assay for high throughput screening. The sequences and/or information derived therefrom can also be used for influencing the expression of the IRS-2 gene, e.g. in the therapy of IRS-2 related metabolic disorders, such as diabetes.

Abstract: A resistor has a resistor body of polycrystalline silicon and electric contact regions arranged on and/or in the resistor body, so that a resistor part is formed between the contact regions, which gives the resistor its resistance. The material in the resistor body is doped with for example boron to define its resistance. To give the resistor a good long term stability the resistor part is protected by one or more oxide based blocking layers produced from transition metals. These blocking layers can prevent movable kinds of atoms such as hydrogen from reaching the unsaturated bonds in the polysilicon. Such movable kinds of atoms can for example exist in passivation layers located outermost in an integrated electronic circuit in which the resistor is included. The blocking layers can be produced from layers having 30% titanium and 70% tungsten, which are oxidized using hydrogen peroxide.

Abstract: On a semiconductor die, a conductive layer is formed by first attaching a semiconductor wafer to a support wafer, then cutting the semiconductor wafer into dies, and finally depositing a conductive layer on the sides of the dies. The conductive layer is preferably a metal layer, which extends into the support wafer, which ensures that, when the support wafer is removed, the conductive layer extends all the way over the sidewall of the semiconductor die. The method allows the simultaneous application of the conductive layer to many dies. The conductive layer reduces the resistance for currents in the radio frequency range flowing close to the edges of the die due to the skin effect.

Abstract: A method for improving tolerance in a human suffering from impaired glucose tolerance including both IGT and Diabetes Mellitus Type 2, comprising ingesting a therapeutic amount of slow-release starch at bedtime. The preferred type of starch for use in this method is natural cornstarch.

Abstract: A resistor has a resistor body of polycrystalline silicon and electric terminals arranged on and/or in the resistor body. A resistor portion is thus formed between the terminals, which gives the resistor its resistance. The material in the resistor body is doped with for example boron. In order to block unsaturated silicon bonds in grain boundaries to a sufficient extent and thereby give the resistor a good long-time stability, fluorine atoms are added to the material. They are added in such a high concentration that all of the otherwise unsaturated bonds are coupled to fluorine atoms. Further, it is provided in the manufacture of the resistor that the concentration is maintained at the originally high value. When ion implanting dopants and fluorine atoms it can be accomplished by performing an annealing after implanting dopants at a high temperature and then a further annealing operation at a low temperature after the subsequent implantation of fluorine.

Abstract: A resistor has a resistor body of polycrystalline silicon and electric terminals arranged on and/or in the resistor body. A resistor portion is thus formed between the terminals, which gives the resistor its resistance. The material in the resistor body is doped with for example boron. In order to block unsaturated silicon bonds in grain boundaries to a sufficient extent and thereby give the resistor a good long-time stability, fluorine atoms are added to the material. They are added in such a high concentration that all of the otherwise unsaturated bonds are coupled to fluorine atoms. Further, it is provided in the manufacture of the resistor that the concentration is maintained at the originally high value. When ion implanting dopants and fluorine atoms it can be accomplished by performing an annealing after implanting dopants at a high temperature and then a further annealing operation at a low temperature after the subsequent implantation of fluorine.