Patents by Inventor Ulrich G. Hensel

Ulrich G. Hensel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Back-gate biasing voltage divider topology circuit structure
    Patent number: 10775826
    Abstract: Embodiments of the present disclosure provide a circuit structure including: a first tap node, a first operational element coupled to the first tap node, the first operational element including at least one transistor having a back-gate, a second tap node coupled to the first operational unit, a second operational element coupled to the second tap node, the second operational element including at least one transistor having a back-gate, and a first back-gate biasing voltage regulator coupled to the second operational element and the first tap node. The first back-gate biasing voltage regulator is configured to supply the at least one transistor of the second operational element with a back-gate biasing voltage level that is different than a voltage level available to the second operational element from the second tap node.
    Type: Grant
    Filed: November 20, 2018
    Date of Patent: September 15, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Ulrich G. Hensel, Jurgen Faul, Arif A. Siddiqi
  • VOLTAGE DIVIDER TOPOLOGY CIRCUIT STRUCTURE
    Publication number: 20200159270
    Abstract: Embodiments of the present disclosure provide a circuit structure including: a first tap node, a first operational element coupled to the first tap node, the first operational element including at least one transistor having a back-gate, a second tap node coupled to the first operational unit, a second operational element coupled to the second tap node, the second operational element including at least one transistor having a back-gate, and a first back-gate biasing voltage regulator coupled to the second operational element and the first tap node. The first back-gate biasing voltage regulator is configured to supply the at least one transistor of the second operational element with a back-gate biasing voltage level that is different than a voltage level available to the second operational element from the second tap node.
    Type: Application
    Filed: November 20, 2018
    Publication date: May 21, 2020
    Inventors: Ulrich G. Hensel, Jurgen Faul, Arif A. Siddiqi