Patents by Inventor Ulrich Lambert
Ulrich Lambert has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 8216361Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.Type: GrantFiled: September 7, 2011Date of Patent: July 10, 2012Assignee: Siltronic AGInventors: Dieter Knerer, Andreas Huber, Ulrich Lambert, Friedrich Passek
-
Patent number: 8088219Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.Type: GrantFiled: July 26, 2007Date of Patent: January 3, 2012Assignee: Siltronic AGInventors: Dieter Knerer, Andreas Huber, Ulrich Lambert, Friedrich Passek
-
Publication number: 20110318546Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.Type: ApplicationFiled: September 7, 2011Publication date: December 29, 2011Applicant: SILTRONIC AGInventors: Dieter Knerer, Andreas Huber, Ulrich Lambert, Friedrich Passek
-
Patent number: 7387676Abstract: In a process for producing silicon semiconductor wafers, a silicon single crystal is pulled using the Czochralski method and is processed to form semiconductor wafers, a ratio V/G of pulling rate V and axial temperature gradient G at a growth front during the pulling of the single crystal being controlled in such a manner that agglomerated vacancy defects above a critical size are formed in the single crystal, the agglomerated vacancy defects, in a region of the semiconductor wafer that is of relevance to electronic components, shrinking during production of the components such that the size in this region no longer exceeds the critical size. Silicon semiconductor wafers with agglomerated vacancy defects in the relevant device region preferably contain agglomerated vacancy defects having an inner surface which is at least partially free of an oxide layer and a size of less than 50 nm.Type: GrantFiled: June 14, 2006Date of Patent: June 17, 2008Assignee: Siltronic AGInventors: Wilfried von Ammon, Walter Haeckl, Andreas Huber, Ulrich Lambert
-
Publication number: 20080026232Abstract: Monocrystalline semiconductor wafers have defect-reduced regions, the defect-reduced regions having a density of GOI-relevant defects within the range of 0/cm2 to 0.1/cm2 and occupy overall an areal proportion of 10% to 100% of the planar area of the semiconductor wafer, wherein the remaining regions of the semiconductor wafer have a significantly higher defect density than the defect-reduced regions. The wafers may be produced by a method for annealing GOI relevant defects in the wafer, by irradiating defined regions of a side of the semiconductor wafer by laser wherein each location is irradiated with a power density of 1 GW/m2 to 10 GW/m2 for at least 25 ms, wherein the laser emits radiation of a wavelength above the absorption edge of the wafer semiconductor material and wherein the temperature of the wafer rises by less than 20 K as a result of irradiation.Type: ApplicationFiled: July 26, 2007Publication date: January 31, 2008Applicant: SILTRONIC AGInventors: Dieter Knerer, Andreas Huber, Ulrich Lambert, Friedrich Passek
-
Publication number: 20060283374Abstract: In a process for producing silicon semiconductor wafers, a silicon single crystal is pulled using the Czochralski method and is processed to form semiconductor wafers, a ratio V/G of pulling rate V and axial temperature gradient G at a growth front during the pulling of the single crystal being controlled in such a manner that agglomerated vacancy defects above a critical size are formed in the single crystal, the agglomerated vacancy defects, in a region of the semiconductor wafer that is of relevance to electronic components, shrinking during production of the components such that the size in this region no longer exceeds the critical size. Silicon semiconductor wafers with agglomerated vacancy defects in the relevant device region preferably contain agglomerated vacancy defects having an inner surface which is at least partially free of an oxide layer and a size of less than 50 nm.Type: ApplicationFiled: June 14, 2006Publication date: December 21, 2006Applicant: Siltronic AGInventors: Wilfried Ammon, Walter Haeckl, Andreas Huber, Ulrich Lambert
-
Patent number: 7122865Abstract: An SOI wafer, includes a substrate made from silicon, an electrically insulating layer with a thermal conductivity of at least 1.6 W/(Km) and a single-crystal silicon layer with a thickness of from 10 nm to 10 ?m, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm2. A process is for producing an SOI wafer of this type, in which a substrate wafer made from silicon is joined to a donor wafer via a layer of the electrically insulating material which has previously been applied. The donor wafer bears a donor layer of single-crystal silicon, with a concentration of vacancies of at most 1012/cm3 and of vacancy agglomerates of at most 105/cm3. After the wafers have been joined, the thickness of the donor wafer is reduced in such a manner that the single-crystal silicon layer having these properties is formed from the donor layer, this single-crystal silicon layer being joined to the substrate wafer via the layer of electrically insulating material.Type: GrantFiled: May 25, 2004Date of Patent: October 17, 2006Assignee: Siltronic AGInventors: Robert Hölzl, Dirk Dantz, Andreas Huber, Ulrich Lambert, Reinhold Wahlich
-
Patent number: 6946030Abstract: A silica glass crucible is produced by a) providing a porous amorphous silica glass green body, which is infiltrated with at least one substance that promotes crystallization of a silica glass crucible, b) drying the infiltrated silica glass green body, c) filling the green body with a metal or semimetal, and d) heating the filled green body for a period of from 1 h to 1000 h to a temperature of from 900 to 2000° C. to form at least a portion of silica crystalline phase. The process may be continued by further heating to melt the metal or semimetal and pulling a single crystal from the melt.Type: GrantFiled: November 12, 2002Date of Patent: September 20, 2005Assignee: Wacker-Chemie GmbHInventors: Fritz Schwertfeger, Holger Szillat, Christoph Frey, Ulrich Lambert, Axel Frauenknecht
-
Publication number: 20040251500Abstract: An SOI wafer, includes a substrate made from silicon, an electrically insulating layer with a thermal conductivity of at least 1.6 W/(Km) and a single-crystal silicon layer with a thickness of from 10 nm to 10 &mgr;m, a standard deviation of at most 5% from the mean layer thickness and a density of at most 0.5 HF defects/cm2.Type: ApplicationFiled: May 25, 2004Publication date: December 16, 2004Applicant: SILTRONIC AGInventors: Robert Holzl, Dirk Dantz, Andreas Huber, Ulrich Lambert, Reinhold Wahlich
-
Publication number: 20030159648Abstract: A silica glass crucible is produced byType: ApplicationFiled: November 12, 2002Publication date: August 28, 2003Inventors: Fritz Schwertfeger, Holger Szillat, Christoph Frey, Ulrich Lambert, Axel Frauenknecht
-
Patent number: 6228164Abstract: A process for producing a silicon single crystal has the crystal being pulled using the Czochralski method while being doped with oxygen and nitrogen. The single crystal is doped with oxygen at a concentration of less than 6.5*1017 atoms cm−3 and with nitrogen at a concentration of more than 5*1013 atoms cm−3 while the single crystal is being pulled. Another process is for producing a single crystal from a silicon melt, in which the single crystal is doped with nitrogen and the single crystal is pulled at a rate V, an axial temperature gradient G(r) being set up at the interface of the single crystal and the melt, in which the ratio V/G(r) in the radial direction is at least partially less than 1.3*10−3cm2min−1 K−1.Type: GrantFiled: May 25, 1999Date of Patent: May 8, 2001Assignee: Wacker Siltronic Gesellschaft für Halbleitermaterialien AGInventors: Wilfried von Ammon, Rüdiger Schmolke, Dieter Gräf, Ulrich Lambert
-
Patent number: 5935320Abstract: A process for producing silicon wafers with low defect density is one wherein a) a silicon single crystal having an oxygen doping concentration of at least 4*10.sup.17 /cm.sup.3 is produced by molten material being solidified to form a single crystal and is then cooled, and the holding time of the single crystal during cooling in the temperature range of from 850.degree. C. to 1100.degree. C. is less than 80 minutes; b) the single crystal is processed to form silicon wafers; and c) the silicon wafers are annealed at a temperature of at least 1000.degree. C. for at least one hour. Also, it is possible to prepare a silicon single crystal based upon having an oxygen doping concentration of at least 4*10.sup.17 /cm.sup.3 and a nitrogen doping concentration of at least 1*10.sup.14 /cm.sup.3 for (a) above.Type: GrantFiled: August 26, 1997Date of Patent: August 10, 1999Assignee: Wacker Siltronic Gesellschaft fur Halbleitermaterialien AGInventors: Dieter Graef, Wilfried Von Ammon, Reinhold Wahlich, Peter Krottenthaler, Ulrich Lambert