Patents by Inventor Ulrich Scheler

Ulrich Scheler has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6800407
    Abstract: The method enables determining imaging errors of photomasks for the lithographic structuring of semiconductors. A latent image of the mask is first produced in a photoactivatable layer by exposure. After heat treatment carried out for increasing the contrast and development of the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist, which leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The mask layout can be tested under production conditions and the adjustment and the checking of all components of the phototransfer system used for the production of microchips is facilitated.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: October 5, 2004
    Assignee: Infineon Technologies AG
    Inventors: Günther Czech, Ernst-Christian Richter, Ulrich Scheler, Michael Sebald
  • Patent number: 6696208
    Abstract: Imaging errors in optical exposure units for the lithographic structuring of semiconductors are determined. First, a latent image of a mask is first produced in a photoactivatable layer by exposure using the optical exposure unit to be tested. After heat treating for increasing the contrast and developing the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist. This leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The method permits testing of optical exposure units under production conditions and thus facilitates the adjustment and the checking of all components of the exposure system used for the production of microchips.
    Type: Grant
    Filed: April 30, 2002
    Date of Patent: February 24, 2004
    Assignee: Infineon Technologies AG
    Inventors: Günther Czech, Ernst-christian Richter, Ulrich Scheler, Michael Sebald
  • Patent number: 6630703
    Abstract: A storage cell configuration including magnetoresistive storage elements located in a cell field between first lines and second lines. A first metalization plane, a second metalization plane and contacts connecting the first metalization plane to the second metalization plane are provided in a periphery. The first lines and the first metalization plane and the second lines and the contacts are disposed on the same plane respectively so that they can be produced by structuring one conductive layer respectively.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: October 7, 2003
    Assignee: Infineon Technologies AG
    Inventors: Ulrich Scheler, Siegfried Schwarzl
  • Publication number: 20030054268
    Abstract: Imaging errors in optical exposure units for the lithographic structuring of semiconductors are determined. First, a latent image of a mask is first produced in a photoactivatable layer by exposure using the optical exposure unit to be tested. After heat treating for increasing the contrast and developing the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist. This leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The method permits testing of optical exposure units under production conditions and thus facilitates the adjustment and the checking of all components of the exposure system used for the production of microchips.
    Type: Application
    Filed: April 30, 2002
    Publication date: March 20, 2003
    Inventors: Gunther Czech, Ernst-christian Richter, Ulrich Scheler, Michael Sebald
  • Publication number: 20030013022
    Abstract: The method enables determining imaging errors of photomasks for the lithographic structuring of semiconductors. A latent image of the mask is first produced in a photoactivatable layer by exposure. After heat treatment carried out for increasing the contrast and development of the exposed resist, the latter is treated with an amplification agent which preferably diffuses into the exposed parts of the photoresist. There, it reacts with groups of the photoresist, which leads to an increase in the layer thickness of the resist in the exposed parts. A topographical image of the surface of the photoresist, which can be created, for example, by scanning electron microscopy, then indicates imaging errors by protuberances which are located outside the image of the mask. The mask layout can be tested under production conditions and the adjustment and the checking of all components of the phototransfer system used for the production of microchips is facilitated.
    Type: Application
    Filed: April 30, 2002
    Publication date: January 16, 2003
    Inventors: Gunther Czech, Ernst-Christian Richter, Ulrich Scheler, Michael Sebald
  • Publication number: 20020041514
    Abstract: A storage cell configuration including magnetoresistive storage elements located in a cell field between first lines and second lines. A first metalization plane, a second metalization plane and contacts connecting the first metalization plane to the second metalization plane are provided in a periphery. The first lines and the first metalization plane and the second lines and the contacts are disposed on the same plane respectively so that they can be produced by structuring one conductive layer respectively.
    Type: Application
    Filed: August 27, 2001
    Publication date: April 11, 2002
    Inventors: Ulrich Scheler, Siegfried Schwarzl
  • Patent number: 5726094
    Abstract: A method for producing a diffusion region adjacent to a recess in a substrate, with which structured diffusion regions can be produced within a recess is provided. The method is suitable, in particular, for producing diffusion regions of different conductivity type, which are arranged adjacent to one and the same recess or different recesses.
    Type: Grant
    Filed: August 14, 1996
    Date of Patent: March 10, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Udo Schwalke, Michael Sebald, Ulrich Scheler
  • Patent number: 5422309
    Abstract: An insulating layer wherein contact holes to regions to be contacted are opened is applied surface-wide onto a substrate. For producing an interconnect mask, a photoresist layer is applied, exposed and developed such that the surface of the regions to be contacted remains covered with photoresist in exposed regions, whereas the surface of the insulating layer is uncovered in the exposed regions. Using the interconnect mask as etching mask, trenches are etched into the insulating layer. Contacts and interconnects of a metallization level are finished by filling the contact holes and the trenches with metal.
    Type: Grant
    Filed: December 16, 1993
    Date of Patent: June 6, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventors: Thomas Zettler, Ulrich Scheler