Patents by Inventor Ulrich Welling

Ulrich Welling has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Predicting defect rate based on lithographic model parameters
    Patent number: 11914306
    Abstract: A calibrated lithographic model may be used to generate a lithographic model output based on an integrated circuit (IC) design layout. Next, at least a chemical parameter may be extracted from the lithographic model output. A calibrated defect rate model may then be used to predict a defect rate for the IC design layout based on the chemical parameter.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: February 27, 2024
    Assignee: Synopsys, Inc.
    Inventors: Erik A. Verduijn, Ulrich Karl Klostermann, Ulrich Welling, Jiuzhou Tang, Hans-Jürgen Stock
  • Stochastic-aware lithographic models for mask synthesis
    Patent number: 11900042
    Abstract: In some aspects, a mask pattern is accessed. The mask pattern is for use in a lithography process that prints a pattern on a wafer. The mask pattern is applied as input to a deterministic model of the lithography process to predict a characteristic of the printed pattern. The deterministic model is deterministic, but it accounts for local stochastic variations of the characteristic in the printed pattern.
    Type: Grant
    Filed: November 9, 2021
    Date of Patent: February 13, 2024
    Assignee: Synopsys, Inc.
    Inventors: Kevin Dean Lucas, Yudhishthir Prasad Kandel, Ulrich Welling, Ulrich Karl Klostermann, Zachary Adam Levinson
  • Calibrating stochastic signals in compact modeling
    Patent number: 11415897
    Abstract: Calibrating stochastic signals in compact modeling is provided by obtaining data of process variations in producing a resist mask; calibrating a continuous compact model of the resist mask based on the data; evaluating the continuous compact model against a stochastic compact model that is based on the data; choosing a functional description of an edge location distribution for the stochastic compact model; mapping image parameters from the evaluation to edge distribution parameters according to the functional description; determining an edge location range for the stochastic compact model based on scaled measurements from the image parameters; calibrating a threshold for the resist mask and updating parameters of the stochastic compact model to reduce a difference between the data and a modeled Line Edge Roughness (LER) value; and outputting the stochastic compact model.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: August 16, 2022
    Assignee: Synopsys, Inc.
    Inventors: Zachary Adam Levinson, Yudhishthir Prasad Kandel, Ulrich Welling
  • STOCHASTIC-AWARE LITHOGRAPHIC MODELS FOR MASK SYNTHESIS
    Publication number: 20220146945
    Abstract: In some aspects, a mask pattern is accessed. The mask pattern is for use in a lithography process that prints a pattern on a wafer. The mask pattern is applied as input to a deterministic model of the lithography process to predict a characteristic of the printed pattern. The deterministic model is deterministic, but it accounts for local stochastic variations of the characteristic in the printed pattern.
    Type: Application
    Filed: November 9, 2021
    Publication date: May 12, 2022
    Inventors: Kevin Dean Lucas, Yudhishthir Prasad Kandel, Ulrich Welling, Ulrich Karl Klostermann, Zachary Adam Levinson
  • CALIBRATING STOCHASTIC SIGNALS IN COMPACT MODELING
    Publication number: 20210382394
    Abstract: Calibrating stochastic signals in compact modeling is provided by obtaining data of process variations in producing a resist mask; calibrating a continuous compact model of the resist mask based on the data; evaluating the continuous compact model against a stochastic compact model that is based on the data; choosing a functional description of an edge location distribution for the stochastic compact model; mapping image parameters from the evaluation to edge distribution parameters according to the functional description; determining an edge location range for the stochastic compact model based on scaled measurements from the image parameters; calibrating a threshold for the resist mask and updating parameters of the stochastic compact model to reduce a difference between the data and a modeled Line Edge Roughness (LER) value; and outputting the stochastic compact model.
    Type: Application
    Filed: June 4, 2021
    Publication date: December 9, 2021
    Inventors: Zachary Adam LEVINSON, Yudhishthir Prasad KANDEL, Ulrich WELLING
  • PREDICTING DEFECT RATE BASED ON LITHOGRAPHIC MODEL PARAMETERS
    Publication number: 20210116817
    Abstract: A calibrated lithographic model may be used to generate a lithographic model output based on an integrated circuit (IC) design layout. Next, at least a chemical parameter may be extracted from the lithographic model output. A calibrated defect rate model may then be used to predict a defect rate for the IC design layout based on the chemical parameter.
    Type: Application
    Filed: October 16, 2020
    Publication date: April 22, 2021
    Applicant: Synopsys, Inc.
    Inventors: Erik A. Verduijn, Ulrich Karl Klostermann, Ulrich Welling, Jiuzhou Tang, Hans-Jürgen Stock